Re: Setting of flags by "Shr" on different processors.

Article View: alt.lang.asm

Article #153

#153

From: Bill Beebe
Date: Fri, 08 Jan 1993 14:36

15 lines
1074 bytes

In article <1993Jan7.154426.3421@odin.diku.dk> terra@diku.dk (Morten Welinder) writes:

>	Mov	Ax,0
>	Mov	Cl,0
>	Cmp	Ax,-1		; Clear zero flag
>	Shr	Ax,Cl		; Result is zero.

If I'm not mistaken, shift instructions with CL=0 will not execute, but
will be handled as NOPs. I'm not sure what you complaining about.

-- 
William H. Beebe, Jr. - wbeebe@bilver.UUCP
                 UUCP - {ucf-cs,peora,uunet}!tarpit!bilver!wbeebe
                      - bilver Public Access Unix, Orlando FL
                      - (407)644-8327  2400/9600  24 hours  8N1

Technical Details

Message-ID: <1993Jan8.143630.14931@bilver.uucp>

Path:

arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!cis.ohio-state.edu!pacific.mps.ohio-state.edu!linac!att!att!fang!tarpit!tous!bilver!wbeebe

References: <1993Jan7.154426.3421@odin.diku.dk>

Show Full Headers

Complete Article Headers

Newsgroups: alt.lang.asm,comp.sys.intel
Path: arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!cis.ohio-state.edu!pacific.mps.ohio-state.edu!linac!att!att!fang!tarpit!tous!bilver!wbeebe
From: wbeebe@bilver.uucp (Bill Beebe)
Subject: Re: Setting of flags by "Shr" on different processors.
Organization: W. J. Vermillion - Winter Park, FL
Date: Fri, 8 Jan 1993 14:36:30 GMT
Message-ID: <1993Jan8.143630.14931@bilver.uucp>
Keywords: shr, intel, flags
References: <1993Jan7.154426.3421@odin.diku.dk>
Lines: 15

Reply to Parent Message