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Article #163

Re: FPU

#163
From: Jerzy Tarasiuk
Date: Fri, 22 Jan 1993 20:28
22 lines
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>>>>> On 14 Jan 93 16:29:11 GMT, riouxm@JSP.UMontreal.CA (Rioux Martin) said:
Rioux> terra@diku.dk (Morten Welinder) Writes:
>No. (Except for FStsw Ax on 80287 and better.) To gain speed use parallel
>execution of FPU and IU.

Rioux> What do you mean by parallel execution of FPU and IU..? I'm new at this.
Rioux> If someone has more HINTS for me please write...

FPU (more formerly NDP, Numeric Data Processor) works paralelly with
CPU (while FPU makes computations, CPU may execute next instructions).
This causes when FPU stores any result to memory, CPU must verify the
result was stored before attempts to get it (otherwise would be able
to read old contents of memory instead the newly stored data).
The verification is done by WAIT (FWAIT) instruction which waits until
FPU finishes its instruction. Note on 80287 or better any FPU opcode
acts as WAIT for previous (on 8087 not, since any but first FPU opcode
must be preceded by WAIT or result will be unpredictable).
There are cases when WAIT cannot be used: if want to reset FPU even if
it is busy (throwing away its current work for a case due to error it
is endless) or when don't know if FPU exist (would wait forever; to
detect FPU need execute FNINIT, delay, FNSTSW, delay, check what was
stored - if anything stored, FPU exists).
Technical Details
Message-ID: <JT.93Jan22212822@fizyk1.fuw.edu.pl>
Path: arc1-ca.pugleaf.net!sparky!uunet!mcsun!sunic!fuw.edu.pl!cocos!jt
References: <1993Jan14.162911.21489@cc.umontreal.ca>

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Path: arc1-ca.pugleaf.net!sparky!uunet!mcsun!sunic!fuw.edu.pl!cocos!jt
From: jt@fuw.edu.pl (Jerzy Tarasiuk)
Subject: Re: FPU
In-Reply-To: riouxm@JSP.UMontreal.CA's message of 14 Jan 93 16:29:11 GMT
Message-ID: <JT.93Jan22212822@fizyk1.fuw.edu.pl>
Sender: news@fuw.edu.pl
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Organization: Warsaw University Physics Dept.
References: <1993Jan14.162911.21489@cc.umontreal.ca>
Date: Fri, 22 Jan 1993 20:28:22 GMT
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