🚀 go-pugleaf

Yes, please post.  I am interested in using DMA to transfer a MCGA 320x256
-256 color image from an aux buffer to the actual screen regen buffer at
0A000h.  It would be very nice to have DMA do this for me since copying the
64k buffer to the actual screen regen buffer (0A000h) is taking up too much
processor load.

If there is a way for DMA to do memory-memory (or memory-video buffer)
transfers, please post how.

Thanks,
Eugster

   In case it helps anyone, here is the article that got me wondering
   about this. I tried the code and it locked my computer up. I don't
   know enough to figure out why.

Path: news.cso.uiuc.edu!ux1.cso.uiuc.edu!sdd.hp.com!cs.utexas.edu!uunet!munnari.oz.au!yoyo.aarnet.edu.au!dstos3.dsto.gov.au!egg
From: egg@dstos3.dsto.gov.au
Newsgroups: rec.games.programmer
Subject: DMA: buggy potential gem
Message-ID: <1992Aug10.093104.164299@dstos3.dsto.gov.au>
Date: 10 Aug 92 15:31:04 GMT
Organization: Defence Science and Technology Organisation
Lines: 135

Hi folks,

  Afew days ago I found an old article from an electronic magazine on
assembly programming. It makes some startling claims about using DMA
memory moves under certain conditions (Read below). I tried everything
I possibly could to get it to work but I dont have the 8259 data sheets.
Has anyone seen it before, used it, or have any suggestions as to why
it does'nt work or if it is actually from someone just having a big
w##k!

Themie

---------------------------------------------------------------------------

                      DMA Transfers for FAST Memory Moves

If you ever have the need for super fast moves of blocks of memory and you
can put up with a lot of restrictions in order to gain the speed there is a
method in the PC environment to move bytes at the rate of one every 3 clock
cycles. Compare that to the clocks for a rep movsb and then say that isn't
fast. This isn't for every programmer and it certainly isn't for every time
you need to move a few bytes.
         The DMA chip is a four channel device. Channel 0 is reserved for
refresh of memory that requires at least 256 consecutive bytes be read some-
where in memory at intervals less than about 4ms. The other three channels
are available for such things as transferring information to and from the
disk drives or the ports. Interesting trivia so far, but not very useful in
moving memory around. It gets worse. The 8259 DMA doesn't know anything about
segments. It only knows a 64k universe. This is where the Page registers come
in. The page registers decide which page (on 64k boundaries) the 8259 will
look at for any operation. There are not, as you might guess, 4 page
registers,but only 2 plus a default. If it is not channel 1 or 2 then it uses
the default register programmed as channel 3.
         A careful reading of the data sheet of the 8259 discloses that it is
capable of doing a memory to memory transfer but only between channels 0 and
1. That is why this method is a little tricky to use. In order to set up your
own parameters you have to disable the timer from asking for a DMA from chan-
nel 0 every x milliseconds and reconfigure the 8259 and assume the respon-
sibility for doing the memory refresh. It actually sounds worse than it is.
The configuring and re configuring of the 8259 doesn't take all that long, so
the time is made up after only moving a few tens of bytes, and if you move at
least 256 CONSECUTIVE bytes the memory refresh requirement is met for another
2 or 3 milliseconds. The page registers are taken care of by setting channels
1 and 3 to the same value.
         Given below is an example of a program I wrote just to test the
idea.  A lot of the setup is too complex to explain in this short article, but
if you are interested in checking it all out you will need a data sheet on
the 8259.  This worked nicely on my machine and should on most compatibles
just the way it is.  With the not-so-compatible it may very well not.  I hope
this listing is well enough commented so you can figure it out and make use of


it sometime.

`                                DMA SOURCE

PAGE 60,132
TITLE DMA MEMORY TO MEMORY
DMA      EQU 0
STACK       SEGMENT PUBLIC 'STACK'
     DB  32 DUP('STACK')
STACK       ENDS
DATA     SEGMENT PUBLIC 'DATA'
SOURCE      DW   08000H
TARGET      DW   09000H
NUMBER      DW   800H
INCDEC      DB   0
PAGER       DB   0BH    ;PAGE (O TO F)
FILL     DB 0    ;2 IF A FILL OP
DATA     ENDS
ASSUME      CS:CODE,DS:DATA,ES:DATA
CODE     SEGMENT PUBLIC 'CODE'
START:
     MOV AX,DATA
     MOV DS,AX
     MOV AX,0B800H
     MOV ES,AX
PAGE:
     MOV AL,PAGER ;PAGE TO OPERATE IN
     OUT 83H,AL
UNDMA:
     OUT 0DH,AL   ;MASTER RESET OF DMA
     MOV DX,03D8H
     MOV AL,1
     OUT DX,AL
     MOV AX,SOURCE     ;WHERE IS IT COMING FROM
     OUT 0H,AL
     MOV AL,AH
     OUT 0H,AL
     MOV AX,TARGET     ;WHERE TO PUT IT
     OUT 2H,AL
     MOV AL,AH
     OUT 2H,AL
     MOV AX,NUMBER     ;HOW MANY
     OUT 3H,AL
     MOV AL,AH
     OUT 3H,AL
     MOV AL,009H  ;ENABLE M TO M,COMPRESSED
     OR  AL,FILL  ;WILL BE 2 IF FILL OP
     OUT 8H,AL
     MOV AL,088H  ;BLOCK MODE, INC, READ
     OR  AL,INCDEC     ;WILL BE 20H IF DEC
     OUT 0BH,AL
     MOV AL,85H   ;BLOCK MODE, INC, WRITE
     OR  AL,INCDEC     ;WILL BE 20H IF DEC
     OUT 0BH,AL
     MOV AL,4    ;THIS IS THE REQUEST
     OUT 9,AL    ;DO IT
     MOV AL,9
     OUT DX,AL
RESET:      OUT  0DH,AL  ;THIS IS A MASTER RESET
     OUT 0CH,AL   ;RESET F/L F/F
     MOV AL,01
     OUT 0,AL
     OUT 0,AL
REINIT:
     MOV AL,0
     OUT 83H,AL   ;MOVES REFRESH TO BASE PAGE
     MOV AL,0FFH
     OUT 1,AL
     PUSH   AX
     OUT 1,AL
     OUT 0BH,AL
     INC AL  ;MODE CHAN3

     OUT 0BH,AL
     PUSH   AX
     POP AX
     POP AX
     POP AX
     MOV AH,4CH
     INT 21H
CODE     ENDS
END      START
`

-- 
------------------------------------------------------------------------
 John A. Slagel     "My old man used to tell me, before he left this
 j-slagel1@uiuc.edu  shitty world, never chase buses or women- you
                     always get left behind." -The Marlboro Man

I don't know about the validity of the source code but the quoted 
documentation refers to the 8259 DMA controller.  This is incorrect,
an i8259 is a Programmable Interrupt Controller.  The correct part
number is i8237.

Just figured it'd make looking up data sheets easier.

Cheers,
	Max
-- 
Max Stevens-Guille      Research & Development      __
Alias Research Inc.     110 Richmond St. East,     /
Toronto, Ontario,       CANADA  M5C 1P1           /         Alias 
max@alias.com                                    /   \      Research
vox: (416) 362-9181     fax: (416) 362-0630     /     \_    Incorporated