🚀 go-pugleaf

Adrian Gentle wrote:
> 
> I know this isn't strictly linux related....
> We're in the process of buying a new machine, which will
> be used largely to run linux - and I have heard that some
> systems can slow down as more memory is added if the
> cache isn't sufficient.
> 
> We're looking at 64M of RAM, and as usual getting conflicting
> messages from different shops.  256k cache on the chip is the
> minimum, but I was after 512k.  Is this necessary/recommended?
> The remaining 256k seems to live on the motherboard - but some
> shops claim that you can't put it on the m/b (I assume this
> says more about their m/b's than the cache!).
> 
> So do I need 512k?  Should it live half on the m/b and half on
> the chip?
> 
> Thanks for any help...
> Adrian.
> --

The following messages extracted from the linux news groups may help 
you on this point:

aem@nic.ott.hookup.net (Andrew E. Mileski) in comp.os.linux.hardware  
on 4 Nov 1996 wrote:
Something to think about when considering motherboards...

The following info comes DIRECTLY off the Intel datasheets.

Intel    Cacheable  Supported
Chipset     RAM        RAM
=======  =========  =========
 430FX      64Mb      128Mb
 430HX     512Mb*     512Mb
 430MX      64Mb      128Mb
 430VX      64Mb      128Mb
 440FX      64Gb+       1Gb
 450GX      64Gb+       4Gb
 450KX      64Gb+     512Mb

* The amount of cacheable memory depends on the amount of tag address
RAM
  installed (8 bits = 64Mb, 9 bits = 128Mb, 10 bits = 256Mb, 11 bits =
512Mb).

+ Pentium Pro processors have an internal cache (it is a separate chip
mounted
  next to the CPU chip in a dual cavity package), hence the chipset
doesn't
  have anything to do with caching.

Some details on Intel products can be found on their web site at:
    http://www.intel.com/design/
Or can be found in the datasheets and manuals available from the
Intel Literature Department.

 
pieterh@sci.kun.nl (Peter den Haan) 
in comp.os.linux.hardware, comp.os.linux.setup
on 10 Dec 1996 wrote:

wkulecz@worldnet.att.net (Walter B Kulecz PhD) writes:

 >djf@us.itd.umich.edu says...
 >
 >>I've been watching comp.os.linux.{hardware,setup,misc} off and on for
 >>a couple months now for information about how to definitively
 >>determine amount of cachable memory for a particular motherboard
 >>and/or cache/tag RAM combination. [...]
 >
 >This depends on the fine print of how the cache and tag RAM is
organized.  I
 >doubt anyone could keep up with all the MB variations out there.

The theory is pretty simple. Off-chip L2 cache in the Intel world is
always direct mapped cache. This means that the address of a location
within the cache, plus the address tag, gives the RAM address it is
associated with. The cachable range is therefore

    max_DRAM_size = cache_size * ( 2 ^ address_tag_width )
                  = 2 ^ ( cache_address_width + address_tag_width )

For example, 256KB cache and an 8 bit wide tag RAM give a range of 256KB
* 2^8 = 64MB. Cache line size and tag RAM capacity do not enter the
equation at all.

Practice is somewhat less straightforward:-
 * some boards use one bit of the tag RAM as a dirty tag bit,
   leaving just 7 bits for the address tag.
 * some boards use two tag RAMs for a much wider address tag; these
   will typically handle 512MB or more with just 256KB cache.
 * some chipsets and/or boards have other design constraints limiting
   the cachable range; e.g. the 430FX and VX will cache just 64MB even
   with 512KB cache, not 128MB as you'd naively expect. The HX has no
   such constraint.

I believe most of this info is in the comp.sys.ibm.pc.hardware FAQ.

Be careful to distinguish between this hard, theoretical limit: the
amount of memory which can be cached at all, and the much softer and
vaguer criterion of the amount of memory which can be cached with a
decent hit rate.

 >>I have 96M installed in a 430FX motherboard with a P5/166 and 512k of
 >>cache.  I upgraded from 32M to 96M and saw no discernible decrease in
 >>performance with casual observation or by running a few informal
 >>benchmarks (BYTE bm, bogoMIPS, dhry/whetstones, mflops, etc.).  This
 >>contradicts articles I've read that state this chipset will not cache
 >>memory above 64M.

Sorry, but it's true---FX and VX alike will not cache anything above
64MB. I don't have the FX datasheet handy, but on page 45 of the VX
sheet is says

   "For the second level cache, only the lower 64MB of main memory
    are cacheable [...]"

You can find datasheets on the Intel developer's website:
http://developer.intel.com/design/pcisets/datashts/index.htm

 - Peter

--
pieterh@sci.kun.nl                 http://thef-nym.sci.kun.nl/~pieterh/


I hope that helps.

-- 
Ian Cowell
icowell@mpce.mq.edu.au
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