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Article #56899netseminar ad
From: markm
Date: Tue, 03 Dec 1996 00:00
Date: Tue, 03 Dec 1996 00:00
21 lines
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1116 bytes
Digital Signal Processing with Xilinx FPGAs Tuesday, December 10, 1996 10:00am - 11:00am Agenda: Distributed Arithmetic SDA FIR Filter Example 8-Tap Slice Building Block High-Speed PDA FIR Filter Decimation FIR Filter Biography Bruce Newgard is a Sr. DSP FAE for Xilinx Corp. (San Jose, CA), where he specializes in FPGA-based DSP applications. He holds a BSEE from the University of Texas at Arlington (Arlington, TX). When he is not developing FPGA-DSP solutions, he enjoys flying, high-performance cars, building airplanes, and spending time with his wife Connie and daughter Katie. Interested Attendees may register at: http://www.netseminar.com
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: 102983,3af5eeae16294123,start X-Google-Attributes: gid102983,public From: markm@inetworld.net Subject: netseminar ad Date: 1996/12/03 Message-ID: <32A4F4B0.BB4@inetworld.net> X-Deja-AN: 202238664 content-type: text/plain; charset=us-ascii organization: Simply Internet, San Diego mime-version: 1.0 newsgroups: aus.computers.linux x-mailer: Mozilla 2.01 (Win95; I)