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Parallel Programming Using Transputers

An Intensive Short Course for Scientists and Engineers

February 15 -17, 1993

Royal Melbourne Institute of Technology
Melbourne, Australia
Department of Computer Systems Engineering
and
University of Twente
Netherlands
Control Laboratory

Course Objectives

To acquire technical knowledge, insight and practical experience of parallel 
system design using occam and transputer networks. 

Background

Inmos transputers form a family of VLSI components for the elementary 
construction of multi-processor computing systems. For example, the T800 
integrates a 10 MIPS 32-bit general purpose processor on a single chip, a 
1.5 MFLOPS (ANSI-IEEE 754 standard) floating point processor, four 
bi-directional 20 Mbits/sec. DMA channels, 4 Kbytes of fast static internal RAM and a programmable 32-bit external memory interface.  Transputers are not
combined using a common bus, as that would cause a bottleneck due to contention.Rather, transputer networks of arbitrary size, shape and power may be created bysimple two-wire connections of the DMA channels.

Harnessing the potential processing power of transputer networks requires the 
development of a fluency in parallel systems design equal to traditional skills for sequential logic. Language support for parallel systems design include both Occam and Parallel C. Occam is a small and simple, but powerful language, which enables such fluency, whereas a Parallel C has extensions in the form of 
procedure calls to model parallelism. The model of parallelism provided by 
occam is a central, not added-on, feature and is directly supported by the 
Inmos transputer. This model reflects major software engineering features 
such as abstraction, structuring, and information hiding and has important 
benefits for the life-cycle development costs of large systems, including the
establishment of libraries of  reusable software and hardware components.

Transputer technologies provide well-engineered, production-quality and 
commercially available tools for parallel processing applications. These tools 
may be used to construct a wide range of systems - anything from 
high-performance fault-tolerant real-time embedded systems to general purpose 
super-computers.

The Course

Software engineering principles, process allocation techniques, real-time 
applications and various embedded and super computing issues will be covered. 
This course will emphasize strengths, weaknesses and likely future developments of transputers. The course will also provide information about the next 
generation of transputers, in the form of the T9000 series.

This course forms the foundation for a series of courses and technical workshopsentitled 'Training for Transputer Technologies'. These are being developed undercontract with the European Community as part of the Communities Actions Program for Education and Training for Technology (COMETT).
 

Course Attendees

If you are thinking of using parallel computing to engineer high-performance, 
high-security systems, this course is for you. If you have picked up basic 
parallel C or occam syntax and semantics and are wondering how best to exploit 
its power, come along. If you have never seen any parallel programming before,
 so much the better! We have found that hardware engineers with only a modest 
knowledge of software, as well as those with some experience with traditional
high-level languages, find the parallel C and occam concepts for parallelism 
particularly easy to master. Consider joining the more than 1000 engineers from academia and industry worldwide who have taken this course since September 1986.

Course Methods

Time will be divided between informal lectures (40%) and hands-on experience 
through practical exercises and a mini-project (60%). There will be a ratio of 
one tutor for every six attendees. Practical experience will be provided using
both a parallel C and occam on a transputer system. Each attendee will have 
access to a PC-hosted transputer system comprising a T800-20 with 2M RAM. Accesswill also be provided to several multi-transputer development environments, 
including a purpose-built 20-transputer system developed at RMIT.

Course Materials

Copies of overhead slides will be provided, along with a set of notes and
articles written by the course developers. Furthermore, solutions to exercises, demonstration software and related libraries will be available.

Course Development

This course was initially developed by the Computing Laboratory of the 
University of Kent, Canterbury, UK, in close co-operation with the Control
 Laboratory of the University of Twente. The Control Laboratory, whose 
transputer experience dates back to 1985, has participated in a number of 
successful industrial projects, has developed an Advanced Occam and Transputer 
Engineering Course, and continues to play a major role in the research of 
real-time embedded systems. The course leaders at RMIT are John Hulskamp and 
David Jones from the Department of Computer Systems Engineering at RMIT, and
Prof. Andre Bakkers from the Twente University, Netherlands.



Parallel Programming Using Transputers

COURSE SCHEDULE

First Day

09:00 AM	Lecture

Concepts of parallelism, software engineering issues, the philosophy of 
transputers and occam, the transputer model of parallelism, the transputer. 


10:30 AM        Laboratory

Introduction to the PC-host and the transputer hardware. The occam and/or 
parallel C language.  Program editing, compiling and executing simple programs.

12:00 PM        Lunch

1:00 PM	Lecture

Primitive processes for the CSP model of computing, the occam 
rendezvous-synchronized and unbuffered communication, simple data types, strong typing rules, examples.

2:00 PM	Laboratory

Exercises. 

3:30 PM	Lecture

Sequential and parallel process constructors, process abstraction, the occam 
discipline for parallelism, replicators, arrays examples. 

5:00 PM	Social hour

6:00 PM	Dinner

7:00 PM	Exercises

9:30 PM	Closing 


Second Day

09:00 AM        Lecture

Simple networks of processes, parallel system building starting from low-level 
components, hierarchies of construction, comparison with sequential methods, 
deadlock and livelock - new issues for the parallel system designer, examples. 

10:30 AM        Laboratory

Exercises. 

12:00 PM        Lunch

1:00 PM	Lecture

Non-determinism: choosing between competing events, asynchronous communication, buffered communication, multiplexing and de-multiplexing channels, examples.

2:00 PM	Laboratory

Exercises. 

3:30 PM	Lecture

Designing parallel software components for reusability and testability, 
reusable interactive test circuits, some larger parallel systems - digital 
logic emulation, control circuits, compilers, programming support environments. 

5:00 PM	Social hour

6:00 PM	Dinner

7:00 PM	Exercises

9:30 PM	Closing

Third Day

9:00 AM Lecture

Channel protocols, generating block moves and DMA, abbreviations and parameter 
passing, anti-aliasing rules, security issues, retyping, performance issues, 
examples. 

10:30 AM	Laboratory

Selection and start of mini-project or continuation of exercises (individuals 
will be able to work at their own pace).

12:00 PM        Lunch

1:00 PM	Lecture

Ports and memory-mapped peripherals, real-time issues, priorities, interrupt
handling, guaranteeing maximum response times, detecting hardware failures on
adjacent processors or links, examples.

2:00 PM	Laboratory

Project work/exercises.

3:30 PM	Lecture

Transputer applications - embedded systems and super computers, case studies of embedded systems. 

5:00 PM	Certificates

5:15 PM	Conclusion

Coffee/tea breaks will be arranged in parallel with practical sessions. This 
course program may be subject to minor alterations.


ENQUIRIES: John Hulskamp
	   Department of Computer Systems Engineering
	   RMIT
	   e-mail: jph@rmit.edu.au

REGISTRATION

Please register me in the Parallel Programming Using Transputers course to be 
held on Febrauary 15-17, 1993 at the Department of Computer Systems Engineering,Royal Melbourne Institute of Technology

Name:    

Organisation:

Address:

Tel: 

Fax: 

e-mail:


Mail, or FAX your application, with remittance, to:

The Administrative Officer
Department of Computer Systems Engineering
RMIT
G.P.O. Box 2476V
MELBOURNE 3001
AUSTRALIA

e-mail: rcojea@co.rmit.edu.au
Tel:  (03) 660-3176
Fax: (03) 662-1060


COURSE FEE:	$A1050

This includes course notes, lunches, morning and afternoon teas, and one eveningdinner.

Course fee is only refundable, less an administrative charge of 30%, if applied for within seven days of the commencement of the course.

A special (non-refundable) discount rate of $A840 is applicable to bona-fide 
members of Australian universities, and post-graduate students. 

Please return this registration form, together with your remittance, by Monday 
February 1, 1993.
 
* The course will be limited to the first 20 registrants.