Thread View: ba.juobs.offered
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Started by jack allen
Fri, 20 Dec 1996 00:00
board level engineer (san mateo, ca.)
Author: jack allen
Date: Fri, 20 Dec 1996 00:00
Date: Fri, 20 Dec 1996 00:00
16 lines
1366 bytes
1366 bytes
This opportunity entails digital design, signal timing analysis, schematic entry, signal integrity analysis/simulation, board bring-up in the lab and transfer of boards to manufacturing. Requires a BSEE/CS or equivalent with 3+ years directly related experience. MSEE/CS or related field preferred. Must have experience and fast bus interfaces and high speed digital logic board design. Expertise with SPICE and Motive or equivalent tool is helpful. Must also have experience with FPGA, Verilog and an understanding of ASIC packaging and PCI Bus architecture. Please respond by fax or email to: Connexion: fax: 415-326-4501 email: eci@ix.netcom.com attn: jack allen ref: e-56
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