Article View: bit.listserv.asm370
Article #1590Re: instruction alignment and DIAG
From: Bruce Crabill
Date: Wed, 01 Jan 1992 02:56
Date: Wed, 01 Jan 1992 02:56
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2962 bytes
>My 9370 is a factor of 45 (yep, forty-five) times slower on unaligned loads. I
>didn't worry much about alignment when I started writing assembler code, on
>that old (late 1970's) 370/138. Now I really have to pay attention to this - I
>guess that's called progress. Admittedly, 3090's and other "serious" computers
>don't suffer from these problems, but unfortunately that's not what I'm working
>on.
>
> Eric
I can verify that this is true. I have a CPU benchmark that I've run on any
system that I can get my fingers on that runs VM (I just made a major revision
of it, anyone out there got any high end ES/9000's they would like
benchmarked? (or other systems?)). At any rate, part of the benchmark
has these tests called L0 to L7, which are testing the time it takes to
execute a Load instruction with the operand on a double word plus 0 to
double word plus 7 alignment. For most systems, say my 3081-GX, you get
times like:
Test Nanoseconds
-------- -----------
L0 72.271
L1 72.276
L2 72.330
L3 72.269
L4 72.289
L5 96.452
L6 96.303
L7 96.306
Which is what you would expect. In L5, the operand crosses a double word
boundary and has to do an extra fetch. But on a 9375-60 I tried it on,
I got:
Test Nanoseconds
-------- -----------
L0 227.356
L1 6114.775
L2 6114.938
L3 6044.049
L4 227.360
L5 6111.301
L6 6113.570
L7 6047.414
My guess as to the cause of this is that the CPU only has a 32 bit bus to
memory and only knows how to do word fetchs. When a off-word fetch is
attempted, a microcode trap must be occuring and the operation is simulated
as a microcode subroutine.
By the way, I'm looking for other CPUs to run my benchmark on. PCMs are
welcome too. When I've collected enough results, I'll stick them on our
LISTSERV for anyone to pick up. It is a CPU intensive benchmark that
measures the execution time of a variety of normal user instructions.
It takes about 5 minutes to run on a 3090-180J class machine (or about
2 hours on the 9375-60...).
Bruce
Technical Details
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<ASM370%91123122123823@OHSTVMA.IRCC.OHIO-STATE.EDU>Path:
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: fcdcb,ae6928c0db3b6ad0,start X-Google-Attributes: gidfcdcb,public X-Google-ArrivalTime: 1991-12-31 22:43:19 PST Path: arc1-ca.pugleaf.net!gmdzi!ira.uka.de!yale.edu!think.com!wupost!darwin.sura.net!paladin.american.edu!auvm!UMDD.BITNET!BRUCE From: BRUCE@UMDD.BITNET (Bruce Crabill) Newsgroups: bit.listserv.asm370 Subject: Re: instruction alignment and DIAG Message-ID: <ASM370%91123122123823@OHSTVMA.IRCC.OHIO-STATE.EDU> Date: 1 Jan 92 02:56:48 GMT Sender: IBM 370 Assembly Programming Discussion List <ASM370@UGA.BITNET> Lines: 57 Comments: Gated by NETNEWS@AUVM.AMERICAN.EDU In-Reply-To: Message received on Tue, 31 Dec 91 12:31:52 EST