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Article #249FT14 Bipolar Linear Array Run, RFMR Deadline, July 24/96
From: Kathryn Campbell
Date: Tue, 25 Jun 1996 00:00
Date: Tue, 25 Jun 1996 00:00
369 lines
16809 bytes
16809 bytes
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CANADIAN MICROELECTRONICS CORPORATION/SOCIETE CANADIENNE DE MICRO-ELECTRONIQUE
NEWS IN MICROELECTRONICS Volume 8, Number 37, June 25, 1996
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TODAY'S ISSUE: FT14 Bipolar Linear Array Run, September 18, 1996 and
RFMR Deadline, July 24, 1996
<<<<>>>>
An FT14 Bipolar Linear Array (FT14) fabrication run is planned
for September 18, 1996 (MPC9601QB).
STEPS REQUIRED NOW:
-------------------
1) Non-Disclosure Agreement
All users of this service will be required to sign a non-disclosure
agreement - contact Mirielle Keeling (keeling@cmc.ca) for
information and forms. This must be done BEFORE the FT14 Design Kit is
released.
2) FT14 Design Kit
The FT14 Design Kit will be available for release approximately July 2, 1996.
RFMRs will be received up to a deadline of July 24, 1996. A Silicon
Allocation Review Committee (SARC) will be set up to review the designs
and a decision on grant space awards will be made by August 16, 1996.
Please note that all RFMR submissions must be made on the form, Request
for Manufacturing Resources for Limited-Access Technologies, "Form RFMR
R3.0/960612, (see attached). The form includes the fabrication
allocation criteria. The form is also available from CMC's World-Wide Web
server, http://www.cmc.ca/Fabrication/Fabrication_Service/SARC/RFMR_blk
1. REQUEST FOR MANUFACTURING RESOURCES PROCEDURE AND DEADLINE: FT14
If you are interested in applying for free space (Grant Category) on
the next FT14 run, you must complete the attached RFMR form and
return it to Mirielle Keeling at CMC (keeling@cmc.ca) by 5:00 p.m. PST
on July 24, 1996. If you do not receive e-mail confirmation that your
RFMR has been received within two working days of submitting it, please
call Mirielle at 613-530-4663. You can expect to hear the results of
the SARC recommendation by August 16, 1996.
Based on a SARC review of RFMR submissions, CMC will negotiate to
acquire area on the fabrication run to accommodate all approved
designs. If insufficient space is available, designs will be
fabricated in order of ranking by the review committee until the space
is used up. LAST MINUTE CLUB DESIGNS WILL ONLY BE FABRICATED IN THE
EVENT OF EXTRA SPACE BECOMING FREE BECAUSE OF NO-SHOWS, ETC.
Designs may be submitted to CMC in CIF or uuencoded GDSII formats
generated using the standard mapping conventions supplied by CMC. The
three-letter prefix for design names in the FT14 technology is
"IQB".
2. DESIGN DEADLINE:
The deadline for submitting your design data and Request for
Implementation (RFI) to CMC is 5:00 p.m. PST on September 18, 1996.
ALL LATE DESIGNS WILL BE TREATED AS LOW PRIORITY AND MAY
NOT BE FABRICATED.
3. FEES:
Non-commercial designs submitted by CMC Member universities that have
been granted space (see item 1 above on how to apply) will be
fabricated in limited quantities at no cost, assuming standard
processing and packaging requirements. Additional loose die,
additional packaged parts, special processing options and special
packaging are available by arrangement. Please identify these
requirements on your RFMR form. CMC will determine the charges for
non-standard services according to the service requested and will
discuss these with the designers.
THERE IS NO PAY-FOR-FABRICATION OPTION IN FT14 TECHNOLOGY AT PRESENT.
4. FURTHER INFORMATION:
For questions on CMC's support of the FT14 Bipolar Linear Array
technology, please contact Hsu Ho (ho@cmc.ca, telephone:
613-530-4674).
The full fabrication schedule can be obtained from CMC's World-Wide Web server,
http://www.cmc.ca
5. ATTACHMENT - Form RFMR 3.0 R/960612
REQUEST FOR MANUFACTURING RESOURCES
for Limited-Access Technologies
SUBMIT FORM TO: keeling@cmc.ca
RFMR SUBMISSION DEADLINE: 5:00 P.M. PST July 24, 1996
DESIGN DATA SUBMISSION DEADLINE: 5:00 P.M. PST September 18, 1996
==============================================================================
C A N A D I A N M I C R O E L E C T R O N I C S C O R P O R A T I O N
Queen's University 210A Carruthers Hall Kingston Ontario K7L 3N6
==============================================================================
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| >>> Line limits will be strictly enforced <<< |
| Point form may be used when responding to questions |
| |
| WWW Information: http://www.cmc.ca/Fabrication/fab.html |
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I: GRANT REQUESTED
******************
1. Project Description and Primary Objectives [max. 10 lines]:
2. Accountable Faculty Member:
Name :____________________________E-mail address:_________________________
3. Is this a new project_____ or part of a series of previous designs_____?
If applicable, give project identification number or design name*
and run date(s) for previous design(s)____________________________________
*Design Name must be of the form:
I + technology* + university code + identifier
[e.g., UU=university code, DDD=identifier: CMOS4S ICAUUDDD,
BiCMOS IBAUUDDD, Mitel ICBUUDDD, FT14 IQBUUDDD, CMOSIS5 ICCUUDDD]
4. Amount of grant requested:
Design Name* Estimated Value of Target Run Name and E-mail
Dimensions Requested (see Fabrication Address of
Grant Schedule on WWW) Principal Designer
(price** x area)
1) ________ ____ x ____ $__________ __________ _________________
2) ________ ____ x ____ $__________ __________ _________________
3) ________ ____ x ____ $__________ __________ _________________
(add lines as needed)
Total Grant Request: $____________________________
**Technology: Prices:
CA = CMOS4S Price: $169/dsm2
BA = BiCMOS Price: $800/mm2
CB = MITEL Price: $2000/tile (3008 x 3008 microns)
QB = FT14 Price: To be determined
CC = CMOSIS5 Price: US$670mm2, +packaging (estimate US$370)
5. Will you have any unusual requests (e.g., special packaging or bonding,
extra chips or dice, post-processing)? Please explain. [max. 4 lines]
II: ADDRESSING THE FABRICATION ALLOCATION CRITERIA
***************************************************
SECTION 1 - REQUIRED CHARACTERISTICS:
Qualification for Fabrication
6. Explain why fabrication is necessary (e.g., explain why simulation or
FPGAs, etc. will not suffice). [max. 6 lines]
7. Describe the feasibility of the project, i.e., elaborate on the design
methodology from functional specification and verification to test,
referencing specific tools/equipment where appropriate. [max. 8 lines]
8. Justify your need for fabrication in the chosen technology (if
appropriate, reference results from previous project designs).
[max. 8 lines]
9. Who is going to test the chip(s)?________________________________________
When do you expect to do the testing (year/month)? _______________________
10. What types of testing are to be performed? Reference all equipment/
tools including test fixturing, and the performance requirements of the
equipment. Is the equipment available to you? If not, how do you plan
to get access to what you require? [max. 12 lines]
11. How much time is allocated for test (indicate time required for
learning the tools, setting up and fixturing, test vector
generation, running the tests, diagnosis of test results and
writing up test reports)? [max. 6 lines]
12. Are you using DFT? ___yes ___no ___not applicable
If yes, what kind of fault coverage do you expect to achieve? [max.
3 lines] If no or not applicable, explain why not. [max. 3 lines]
SECTION 2 - EFFECTIVENESS MEASURES:
Quality and Impact of the Project
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| In this section you may reference other documents that are readily |
| available to the CMC (e.g., member reports, equipment loan applications).|
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13. Does this project contribute to postgraduate degree work of student(s)?
____yes ___no If yes, how? [max. 3 lines]
Complete for each student involved in the project:
Student(s): ___________________________________________________________
Faculty Advisor(s): ___________________________________________________
Projected Graduation Date: ____________________________________________
(add lines as needed)
14. Describe the research team (accountable faculty, graduate students, and
research associates) for this project (primary investigators first):
Name: ___________________________________________
Position: _______________________________________
Percentage of time committed to the project: ____%
Name: ___________________________________________
Position: _______________________________________
Percentage of time committed to the project: ____%
(add lines as needed)
15. What is the total number of designs fabricated through CMC in the past
three years by the principal members of your research team?
0: ___ 1-3: ____ 4-6: ____ >6: ____ (check one)
16. Describe the support (e.g., funding, facilities) available for this
project. [max. 5 lines]
17. Provide references for papers (conference or journal), produced by members
of your research team within the last three years, that are most relevant
to this project. [max. 5 papers in total]
18. Give evidence of the design ability and success of your design team,
including examples of successful designs in the last three years.
[max. 3 lines]
19. Is this project part of a collaboration with industry or other external
agencies? ____ yes ____ no
If yes, provide the following information for each organization:
Organization Contact Support
__________________ ___________ ________________________________
__________________ ___________ ________________________________
(add lines as needed)
Can this information be disclosed to SARC reviewers? ___yes ___no
20. What has your team contributed to the university microelectronics
environment and/or CMC in the last three years? (e.g., designs, tools,
services, TAC, etc.) [max. 10 lines]
III: GENERAL INFORMATION
*************************
21. Provide any additional information you feel is relevant to the
quality, impact, and/or management of the project. [max. 10 lines]:
Attachment 1:
FABRICATION ALLOCATION CRITERIA FOR LIMITED-ACCESS TECHNOLOGIES
--------------------------------------------------------------------------------
Applications for fabrication, via CMC's Request For Manufacturing
Resources form (RFMR), may be made up to 18 months prior to the
requested fabrication date. This is particularly recommended if it is
expected that designs will be large and/or complex and/or if the
project involves a series of designs over an extended period.
The Silicon Allocation Review Committee (SARC), a committee of peers,
will use the following criteria to recommend the amount of fabrication
area CMC should grant to a project or individual design requiring
limited-access manufacturing technology. RFMRs which fail to meet all
Required Characteristics (see Section 1 below) will be rejected without
further consideration.
CMC reserves the right to reject any design at the time of submission
for fabrication if it differs significantly from the RFMR description
for which grant space was allocated, or for reasons of design quality or
manufacturability, or if the design is received by CMC any time after
the submission deadline date for the intended fabrication run.
SECTION 1 - REQUIRED CHARACTERISTICS
-------------------------------------
Qualification for fabrication as evidenced by:
1.1 need for chips ( e.g., explanation of why simulation is not sufficient).
1.2 project feasibility (e.g., elaboration of design intent
for chip and/or chip sets from functional
specification and verification to test plans).
1.3 justification for fabrication in the requested
technology (e.g., referencing density and speed requirements
where relevant, and any previous results).
1.4 project management (e.g., clarity and focus of objectives, funding,
facilities and support personnel available for this project).
SECTION 2 - EFFECTIVENESS MEASURES
------------------------------------
Quality and impact of the project evidenced in the following
areas:
2.1 Student Training
- contribution to student's or students' postgraduate degree
programs.
2.2 Research
- novelty and contribution to advancement of the state-of-
the-art in microelectronics (e.g., design technique,
architecture)
- description and qualifications of research team (faculty,
associates and students involved) including research time
committed to the project, quality of researchers (e.g.,
publications, international recognition)
- previous projects undertaken and record of IC design
success.
2.3 Industry Collaboration
- collaboration with Canadian industry or agencies in
pre-competitive research (potential benefits, opportunities
for technology transfer or commercialization, development
of processes and industry personnel).
2.4 Contribution to microelectronics research and training in Canada
- contributions to the research programs of your own or
other universities, and to CMC's national infrastructure
(e.g., cells, software, test chips, documentation).
NOTES:
1. Weightings of the above criteria are equal, but may change at the
discretion of the CMC Board of Directors to allow influence to be
exercised on different areas as circumstances change.
2. Effectiveness will be assessed on a sliding, multi-year basis.
Information to be presented in applications will be limited to the
preceding three years.
3. In special situations or unforeseen circumstances, the criteria are
subject to fair and open judgement.
4. Contract research activities are not eligible for grant space if
results and information are for the direct benefit of the industry
funder only. Fabrication services are available on a pay-for-fab
basis in these cases.
Form RFMR R3.0/960612
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CMC - NEWS IN MICROELECTRONICS is distributed electronically by the Canadian
Microelectronics Corporation for information exchange primarily between
Canadian individuals and groups working in VLSI-related fields.
For further information contact Kathryn Campbell Internet: info@cmc.ca
Fax: (613) 548-8104
Telephone: (613) 530-4654
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CANADIAN MICROELECTRONICS CORPORATION/SOCIETE CANADIENNE DE MICRO-ELECTRONIQUE
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X-Google-Language: ENGLISH,ASCII-7-bit X-Google-Thread: f70d0,e438bb011c80df25,start X-Google-Attributes: gidf70d0,public From: kathryn@classic4.ic.cmc.ca (Kathryn Campbell) Subject: FT14 Bipolar Linear Array Run, RFMR Deadline, July 24/96 Date: 1996/06/25 Message-ID: <DtKJDy.DEE@enid.cmc.ca> X-Deja-AN: 162129554 distribution: can sender: usenet@enid.cmc.ca x-nntp-posting-host: classic4 organization: Canadian Microelectronics Corporation newsgroups: can.vlsi