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http://amp.ece.cmu.edu/ECESeminar/
Prof. Tsuhan Chen, host, 2000 ECE Seminar Series

                           ECE SEMINAR SERIES
                               *Note Day*

                      -----------------------------
                         FRIDAY, MAY 12, 2000
                                4:00 PM
                        Refreshments:  3:30 PM
                     Scaife Hall Auditorium, Rm. 125
                     ------------------------------
    
     ``PHILIPS' VLIW PROCESSORS AND EMBEDDED SYSTEM LEVEL DESIGN''

                             Dr. Kees Vissers
                      Philips Research Laboratories
                                   and
                    Visiting Industrial Fellow at UC Berkeley
       

                                 Abstract

The rapid progress of semiconductor technology makes it possible to combine
programmable and dedicated parts on a single chip to perform simultaneously
several multi-media functions. Applications of these systems can be found in
video conferencing, professional equipment and in the field of conventional
TVs and Digital TVs based on the ATV standard. Several generations of
architectures consisting of combinations of a VLIW core and coprocessors are
solutions Philips is pursuing. The current architecture of the 32-bit TM1000
from Philips Trimedia Semiconductor division will be illustrated. The
general concepts of VLIW (Very Long Instruction Word) will be explained. The
exploitation of SIMD style vector operations will be illustrated and the
complete retargetable tool chain for architecture research will be
illustrated. Preliminary results obtained with this tool chain for the next
generation 64-bit VLIW will be illustrated. Some quantitative evaluations of
the instruction set are shown by applying the retargetable compiler to C
programs for the Inverse Discrete Cosine Transform, using realistic models
for clock-cycle-accurate behaviour of next generation processors. These
results will be compared with other Media processors. Finally some
applications of video processing with the current and future processors will
be illustrated. One of the innovative applications is a software
implemetation on the VLIW core of motion estimator and frame rate convertor
to provide judder free display of movie material.

                                      Bio

Kees Vissers graduated in 1980 from Delft University of Technology. He
started directly at Philips Research in the field of high-level simulation.
>From 1987 till 1988 he was a visiting researcher at Carnegie Mellon
University in the USA, with the group of Don Thomas. Since then he worked at
Philips Research Eindhoven in the fields of high-level synthesis and
programmable video signal processing systems, and programmable DSP
processors. He is involved in architecture research for VLIW CPUs and in
research for System Level Design, including the trade-offs between
programmable and dedicated components in a system. His application
experience is mainly in high performance video applications. This year he is
a visiting industrial fellow at the EECS department of UC Berkeley with
Prof. Edward Lee.