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Article #8Digital design/ASIC/FPGA/CAD/systems/hardware engineer (MSEE) looking for a new jonb in California
From: AS Andreas Schmidt
Date: Wed, 03 Oct 2001 06:54
Date: Wed, 03 Oct 2001 06:54
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Dear recruiting team,
� you are looking for a highly-motivated digital
design/systems/CAD/FPGA/ASIC/hardware engineer?
� you need an engineer who is fascinated of
computer technology, especially parallel/vector
architectures, System-On-a-Chip and high-speed
datacommunications?
� you ask for an employee who's motivation to study
electrical engineering was generated by Seymour
Cray and his machines?
� you are searching for a creative mind combined
with strong problem solving capabilities?
� you want a new member for your team, who is
committed to excellence and success?
� you desire an open-minded person who is
programmed to reach the goal, increasing your
efficiency and pushing the limits?
Try this.....
=> http://www.asic.cc
Best regards,
Dipl.-Ing. Andreas Schmidt
P.S.: Everything is possible,
if you really want it...
Resume for Andreas Schmidt
Personal
Dipl.-Ing. Andreas Schmidt (MSEE)
Fremont, CA, USA
Phone: +1-408-768-1088, +1-510-687-1611
em@il: as@asic.cc
homesite: http://www.asic.cc
Objective
Digital Design/Systems/CAD/ASIC/FPGA Engineer
in an innovative, industry-leading
company
Summary
� Experience with VHDL/Verilog - synthesis /
simulation tools since 1994
� Gate level simulation experience since
1992
� Experience with XILINX FPGA technology and
tools since 1990
� Circuit design experience since 1984
� Computer experience since 1983
(AppleII, UCSD-Pascal)
Experience
September 2000 � present:
Blue Iguana Networks (Nuvation spin-off),
Fremont, CA, USA /
Nuvation Labs Corporation, San Jose, CA,
USA
Senior Hardware Engineer
� coauthor of the initial Blue Iguana
patent
� system architecture and development of
the BI technology on the target side
� development of future BI technology
Technical Lead
� design and integration of a Voice-over-
IP design for an optical network device
� mentoring, in-house education and
consulting
� CAD/EDA tool support, license
administration and support
1994 � August 2000:
Andreas Schmidt ASIC-Design, Technical
Consulting, Hard- & Software,Bochum,
Germany
Entrepreneur
� Project work concerning digital
circuit/system-design
(using Xilinx Foundation, ALDEC Active-HDL, Synplicity,
Synopsys, Mentor tools, etc...)
� computer solutions for spezialized
enviroments (medical technology)
� Authorized SUN-VAR, Apple-, Microsoft-,
Microsoft education-dealer
� System administration of heterogenous
networks (SUN/Apple/WinNT-Platforms)
� Technical Consulting concerning
networking, computer solutions,
system design
1992 � 1996: Institute Electron Devices and
Integrated Circuits,
Ruhr-Universit�t Bochum,
Germany
Assistant to Systemadmistrator (1 year)
� Administration of SunOS 4.1.3,
Solaris 2.4, ULTRIX, Linux, MicroVMS
� Programming of SunOS, Solaris, ULTRIX
� Installing and configuring of
development systems
Teaching Assistant: IC-design II design
course (Digital circuits) (3 years)
� Xilinx FPGA, Xilinx XACT,
Synopsys tools, SunOS 4.1.3,
SUN SPARC 10/20
� Mietec CMOS standardcells(1.2�),
Cadence ASIC design tools, ULTRIX, DECstation5000
� MMI CMOS-Gate-Arrays,
Silvar-Lisco SL2000, MicroVMS,
MicroVAXII
1991 � 1994: NEUROTECH GmbH, Oberhausen,
Germany
Developer of Digital circuits/systems
� Design of interfaces to Hell/Linotype
Reprograhic Scanner/Recorder
using INMOS Transputer and XILINX FPGA
technology (XC3090, XC4010, XACT),
Dash, Workview
� Project management of the schematic-
converter Dash2View (Dash -> Workview)
� Developing testprograms using Pascal
Education
Ruhr-Universit�t Bochum, Germany:
Dipl.-Ing. Elektrotechnik 1999/2000
(MSEE degree)
Master-Thesis:
�Realization of an efficient
acquisition of measurement-data
and control of a halfbridge-current-
inverter for the operation
of a Superconducting Magnetic Energy
Storage system".
VISA status/ US: H1B
citizenship EU: german citizen
References available on request.
Please visit my homesite:
http://www.asic.cc
for the latest news...
Technical Details
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X-Google-Language: ENGLISH,ASCII X-Google-Thread: fec08,4f4168cb7293b36a,start X-Google-Attributes: gidfec08,public X-Google-Thread: 112e4c,4f4168cb7293b36a,start X-Google-Attributes: gid112e4c,public X-Google-Thread: 1089ad,4f4168cb7293b36a,start X-Google-Attributes: gid1089ad,public X-Google-Thread: 101783,4f4168cb7293b36a,start X-Google-Attributes: gid101783,public X-Google-Thread: 100e38,4f4168cb7293b36a,start X-Google-Attributes: gid100e38,public X-Google-ArrivalTime: 2001-10-02 23:54:00 PST Path: arc1-ca.pugleaf.net!archiver1.google.com!postnews1.google.com!not-for-mail From: as@asic.cc (AS Andreas Schmidt) Newsgroups: comp.arch.fpga,comp.lang.verilog,comp.lang.vhdl,ba.jobs.resumes,misc.jobs.resumes Subject: Digital design/ASIC/FPGA/CAD/systems/hardware engineer (MSEE) looking for a new jonb in California Date: 2 Oct 2001 23:54:00 -0700 Organization: http://groups.google.com/ Lines: 149 Message-ID: <f84c12b4.0110022253.4e49d0b4@posting.google.com> NNTP-Posting-Host: 66.121.24.67 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Trace: posting.google.com 1002092040 28908 127.0.0.1 (3 Oct 2001 06:54:00 GMT) X-Complaints-To: groups-abuse@google.com NNTP-Posting-Date: 3 Oct 2001 06:54:00 GMT