Article View: comp.arch
Article #10493Re: Compilers and efficiency
From: Randell Jesup
Date: Mon, 29 Apr 1991 04:35
Date: Mon, 29 Apr 1991 04:35
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1772 bytes
In article <11411@mentor.cc.purdue.edu> hrubin@pop.stat.purdue.edu (Herman Rubin) writes:
>If this was the case, the hardware was deficient. To a mathematician, floating
>point arithmetic is a complicated version of fixed point arithmetic. This is a
>point which the RISC designers do not see; the chip real estate for doing good
>integer arithmetic is already there in the floating point stuff, and the design
>should be such as to use it. Floating point arithmetic uses fixed point
>internally, so this would not be a problem AT THE TIME OF THE DESIGN OF THE
>ARCHITECTURE. It is a problem afterward.
The RPM-40 used the floating point HW for integer multiple and divide,
and I'm certain at least a few others have also. However, don't do this if
you have only a couple FP registers (a problem the rpm40 had).
--
Randell Jesup, Keeper of AmigaDos, Commodore Engineering.
{uunet|rutgers}!cbmvax!jesup, jesup@cbmvax.commodore.com BIX: rjesup
Disclaimer: Nothing I say is anything other than my personal opinion.
Thus spake the Master Ninjei: "To program a million-line operating system
is easy, to change a man's temperament is more difficult."
(From "The Zen of Programming") ;-)
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!cs.utexas.edu!sun-barr!rutgers!cbmvax!jesup From: jesup@cbmvax.commodore.com (Randell Jesup) Newsgroups: comp.arch Subject: Re: Compilers and efficiency Message-ID: <21033@cbmvax.commodore.com> Date: 29 Apr 91 04:35:13 GMT References: <27fa3350.6bc2@petunia.CalPoly.EDU> <9782@mentor.cc.purdue.edu> <4082@batman.moravian.EDU> <11411@mentor.cc.purdue.edu> Reply-To: jesup@cbmvax.commodore.com (Randell Jesup) Organization: Commodore, West Chester, PA Lines: 20