Article View: comp.arch
Article #10699Re: Vector vs Cache/Superscalar
From: Andy Glew
Date: Tue, 07 May 1991 16:25
Date: Tue, 07 May 1991 16:25
35 lines
1951 bytes
1951 bytes
Just blueskying, but:
The biggest advantage of vector instructions is that they convey
to the memory system the access pattern. You have to add a lot of
logic to your memory buffers to detect patterns beyond the simple "the
next address is a stride of 64 past the previous" address
differencing.
A secondary advantage of vector instructions is that they map to
multiple simple operations.
Most vector implementations are pipelined, not element-by-element
parallel. It isn't too hard to do superscalar/superpipelined
implementations of scalar instruction sets that obtain parallelism
comparable to most vector implementations. Multiple memory ports get
harder, but are doable. But the access pattern info isn't there.
A disadvantage of architecting a vector instruction set is the
combinatoric explosion: first you provide element by element vector
ops, then vector reductions, then recurrences; then you have to decide
which vector ops are going to chain...
So: why not combine vector memory access instructions that convey
access pattern, with scalar computational operations?
--
Andy Glew, glew@ichips.intel.com
Intel Corp., M/S JF1-19, 5200 NE Elam Young Parkway,
Hillsboro, Oregon 97124-6497
This is a private posting; it does not indicate opinions or positions
of Intel Corp.
Technical Details
Message-ID:
<GLEW.91May7172546@pdx007.intel.com>Path:
arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!wuarchive!uunet!littlei!intelhf!ichips!ichips!glewReferences:
<1991May4.031835.7979@midway.uchicago.edu> <1991May6.035310.26794@marlin.jcu.edu.au> <11921@mentor.cc.purdue.edu>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!wuarchive!uunet!littlei!intelhf!ichips!ichips!glew From: glew@pdx007.intel.com (Andy Glew) Newsgroups: comp.arch Subject: Re: Vector vs Cache/Superscalar Message-ID: <GLEW.91May7172546@pdx007.intel.com> Date: 7 May 91 16:25:46 GMT References: <1991May4.031835.7979@midway.uchicago.edu> <1991May6.035310.26794@marlin.jcu.edu.au> <11921@mentor.cc.purdue.edu> Sender: news@ichips.intel.com (News Account) Organization: Intel Corp., Hillsboro, Oregon Lines: 35 In-Reply-To: hrubin@pop.stat.purdue.edu's message of 6 May 91 10:32:31 GMT