Article View: comp.arch
Article #10738Re: Any new instructions in a i486?
From: Josh Osborne
Date: Mon, 21 Dec 1992 17:42
Date: Mon, 21 Dec 1992 17:42
17 lines
1522 bytes
1522 bytes
In article <PCG.92Dec19162224@decb.aber.ac.uk> pcg@aber.ac.uk (Piercarlo Grandi) writes:
[...]
>No, this cannot be the reason. As a rule the Cyrix 486DLC CPU chip is
>sold with the Cyrix Fasmath (a 387) coprocessor, the combo being touted
>quite reasonably as a 486DX equivalent.
I don't think this is the case (but I would love to be wrong...). I beleve
the #clocks each insn takes is more like the 386, then the i486. I know the
i486 takes 1 cycle to add 2 registers, I think the i386 takes 3, and I think
the cy486 does also. The cy486 _does_ multiply quite fast 'tho, I think faster
then the i486.
--
stripes@pix.com "Security for Unix is like
Josh_Osborne@Real_World,The Multitasking for MS-DOS"
"The dyslexic porgramer" - Kevin Lockwood
We all agree on the necessity of compromise. We just can't agree on
when it's necessary to compromise. - Larry Wall
Technical Details
Message-ID:
<BzMEIJ.Anz@pix.com>Path:
arc1-ca.pugleaf.net!sparky!uunet!noc.near.net!hri.com!spool.mu.edu!darwin.sura.net!bogus.sura.net!pandora.pix.com!stripesReferences:
<WAYNE.92Dec11164422@backbone.uucp> <9212130000.AA05447@iecc.cambridge.ma.us> <PCG.92Dec19162224@decb.aber.ac.uk>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!noc.near.net!hri.com!spool.mu.edu!darwin.sura.net!bogus.sura.net!pandora.pix.com!stripes From: stripes@pix.com (Josh Osborne) Newsgroups: comp.arch Subject: Re: Any new instructions in a i486? Message-ID: <BzMEIJ.Anz@pix.com> Date: 21 Dec 92 17:42:18 GMT References: <WAYNE.92Dec11164422@backbone.uucp> <9212130000.AA05447@iecc.cambridge.ma.us> <PCG.92Dec19162224@decb.aber.ac.uk> Sender: news@pix.com (The News Subsystem) Organization: Pix Technologies -- The company with no adult supervision Lines: 17 Nntp-Posting-Host: pandora.pix.com