🚀 go-pugleaf

In article <1992Dec14.072942.21962@doug.cae.wisc.edu>, keiths@cae.wisc.edu (Keith Scidmore) writes:

>2)  The 21064 has no integer divide.  Again, isn't this going to make math
>    performance poor.  Integer constants can be converted to multiplies
>    but this is only a partial solution.

From the Alpha Architecture Handbook, p A-12, or the Alpha Architecture
Reference Manual, also p A-12:

Integer division does not exist as a hardware opcode. Division by a
constant can always be done via UMULH of another appropriate constant,
followed by a right shift. General quadword division by true variables
can be done via a subroutine. The subroutine could test for small
divisors (less than about 1000 in absolute value) and for those, do a
table lookup on the exact constant and shift count for an UMULH/shift
sequence. For the remaining cases, a table lookup on about a 1000-entry
table and a multiply can give a linear approximation to 1/divisor that
is accurate to 16 bits. Using this approximation, a multiply and a
back-multiply and a subtract can generate one 16-bit quotient "digit"
plus a 48-bit new partial dividend. Three more such steps can generate
the full quotient. Having prior knowledge of the possible sizes of the
divisor and dividend, normalizing away leading bytes of zeros, and
performing an early-out test can reduce the average number of
multiplies to about 5 (compared to a best case of 1 and a worst case of
9).

>Thanks in advance.
>
>Keith R. Scidmore

PJDM
--
Peter Mayne                     | My statements, not Digital's.
Digital Equipment Corporation   |
Canberra, ACT, Australia        | "AXP!": Bill the Cat