Article View: comp.arch
Article #10981Re: Superscalar vs. multiple CPUs ?
From: Piercarlo Grandi
Date: Sun, 27 Dec 1992 20:07
Date: Sun, 27 Dec 1992 20:07
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3465 bytes
On 23 Dec 92 16:46:17 GMT, solman@athena.mit.edu (Jason W Solinsky) said: solman> We seem to be saying the same things only you keep on talking solman> about macro-level parallelism as though it would be difficult to solman> exploit, and I feel that the existence of macro-level solman> parallelism justifies increased superscalarity. It's your very feeling that I find very, very optimistic, and totally unsupported by past experience. But maybe I am too conservative, and I hope that I am wrong. After all the human brain seems to be built like you say, as a very highly parallel dataflow engine, not a massively (macro) parallel machine. solman> It is my contention that as processors continue to get more and solman> more hyperscalar, they will be increasingly able to exploit solman> macro-level parallelism without the help of smart compilers As a contention, stated so bluntly, it stands on its own. I can only repeat that I am skeptical, as the experience so far seems that basic block level parallelism (which can exploited with multiple functional units within the same CPU) is quite a different thing from continuation level parallelism (which can be exploited with multiple CPUs within the same machine). solman> In a hyperscalar chip it will be necessary to implement tagging solman> and/or scoreboarding protocols to control resource allocation solman> and make sure that none of the data gets mixed up. One of the big problems in going from the basic block to the continuation level is that scheduling basic blocks is relatively easy, as there are no conditional branches, or at most you deal with loops (I am discounting heroic attempts to fit things like trace scheduling to general purpose codes). Getting multiple threads to run within the same CPU requires more than a bit of things like speculative execution, and maybe even backtracking. solman> Once this overhead is paid, the protocols can be altered to find solman> macro level parallelism on their own with very little additional solman> cost in either performance or area. More than overhead I would say that the problem is that as of now nobody have got the faintest clue on how to make this work in particular cases, not to mention in the general case. I'd love to be proved underinformed on this. Maybe you are thinking of something like Hewitt's ideas on actor based computing; but to me they look like an imaginative way organize macro level parallelism. -- Piercarlo Grandi, Dept of CS, PC/UW@Aberystwyth <pcg@aber.ac.uk> E l'italiano cantava, cantava. E le sue disperate invocazioni giunsero alle orecchie del suo divino protettore, il dio della barzelletta
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<1992Dec7.012026.11482@athena.mit.edu> <PCG.92Dec11162630@aberdb.aber.ac.uk> <PCG.92Dec23144916@decb.aber.ac.uk> <1992Dec23.164617.8055@athena.mit.edu>Show Full Headers
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Path: arc1-ca.pugleaf.net!sparky!uunet!europa.asd.contel.com!gatech!usenet.ins.cwru.edu!agate!doc.ic.ac.uk!uknet!gdt!aber!fronta.aber.ac.uk!pcg From: pcg@aber.ac.uk (Piercarlo Grandi) Newsgroups: comp.arch,comp.sys.intel Subject: Re: Superscalar vs. multiple CPUs ? Message-ID: <PCG.92Dec27200733@decb.aber.ac.uk> Date: 27 Dec 92 20:07:33 GMT References: <1992Dec7.012026.11482@athena.mit.edu> <PCG.92Dec11162630@aberdb.aber.ac.uk> <PCG.92Dec23144916@decb.aber.ac.uk> <1992Dec23.164617.8055@athena.mit.edu> Sender: news@aber.ac.uk (USENET news service) Reply-To: pcg@aber.ac.uk (Piercarlo Grandi) Organization: Prifysgol Cymru, Aberystwyth Lines: 53 In-Reply-To: solman@athena.mit.edu's message of 23 Dec 92 16: 46:17 GMT Nntp-Posting-Host: decb.aber.ac.uk