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Article #11016IBM Clock-tripled 486
From: Ron Marquardt
Date: Mon, 16 Nov 1992 21:18
Date: Mon, 16 Nov 1992 21:18
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1339 bytes
So, I understand that IBM announced a clock-tripled (33MHz/99MHz) version of the 486 (a DX3?) at Comdex. Can anyone in the know at IBM (or Intel) comment further on this? IBM supposedly designed this chip under their existing licensing agreement with Intel. If I understand that agreement properly, IBM has 6 months to exclusively do their thing with it before Intel can provide their own version to the masses. Is that correct? Also, what kind of incremental/marginal gain is there to clock tripling? Does this chip have extra cache to compensate for the additional I/O burden? Thanks. -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- Ron Marquardt E-mail: rrm@ssdp.caltech.edu Solid State Device Physics Group rrm@cco.caltech.edu California Institute of Technology
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arc1-ca.pugleaf.net!sparky!uunet!ferkel.ucsb.edu!taco!rock!stanford.edu!agate!spool.mu.edu!olivea!charnel!rat!usc!cs.utexas.edu!swrinde!elroy.jpl.nasa.gov!nntp-server.caltech.edu!pluto!rrmShow Full Headers
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Path: arc1-ca.pugleaf.net!sparky!uunet!ferkel.ucsb.edu!taco!rock!stanford.edu!agate!spool.mu.edu!olivea!charnel!rat!usc!cs.utexas.edu!swrinde!elroy.jpl.nasa.gov!nntp-server.caltech.edu!pluto!rrm From: rrm@ssdp.caltech.edu (Ron Marquardt) Newsgroups: comp.arch Subject: IBM Clock-tripled 486 Message-ID: <1e937lINNq50@gap.caltech.edu> Date: 16 Nov 92 21:18:45 GMT Reply-To: rrm@ssdp.caltech.edu Organization: California Institute of Technology Lines: 15 NNTP-Posting-Host: pluto.ssdp.caltech.edu