🚀 go-pugleaf

>> We describe an efficient software cache consistency mechanism for shared
>> memory multiprocessors that supports multiple writers and works for
>> cache lines of any size.  Our mechanism relies on the fact that, for a
>> correct program, only the global memory needs a consistent view of the
>> shared data between synchronization points.  Our delayed consistency
>> mechanism allows arbitrary use of data blocks between synchronizations.

>cliffc@rice.edu (Cliff Click) writes:
>>This sounds like an paraphrase of Ervan Darnell's thesis proposal here
>>at Rice.

zs@munta.cs.mu.OZ.AU (Zoltan Somogyi) writes:
>This idea is quite old. It was the subject of a tech report six years ago:
>
>%A D. Abramson
>%A K. Ramamohanarao
>%A M. Ross
>%T A software controlled cache coherence policy,
>using selectively clearable cache memories
>%R Technical Report 86/18
>%I Department of Computer Science, University of Melbourne
>%C Melbourne, Australia
>%D 1986

In defense of Ervan's work:
He's exploring compiler optimization to lower the cost of maintaining
cache coherence via software.  Presumably, machines like IBM's will
benefit from his efforts (and the efforts of all the other people
working in the same direction).

Preston Briggs