Article View: comp.arch
Article #11106Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE
From: AJ Casamento
Date: Wed, 16 Dec 1992 11:22
Date: Wed, 16 Dec 1992 11:22
128 lines
6377 bytes
6377 bytes
In article <1992Dec15.194637.10009@eng.umd.edu> sysmgr@king.eng.umd.edu (Doug
Mohney) writes:
>> In article <1992Dec15.171554.2781@twisto.eng.hou.compaq.com>, leigh@croatia.
>>eng.hou.compaq.com (Kevin Leigh) writes:
>> [wondering what Yet Another Standard would do for anyone, since EISA has
>> limited penetration and Local Bus/PCMICA <sp> have just emerged and are
>> hitting the streets...]
> You guys ever thought of licensing TurboChannel from DEC and building a
> Pentium box/server around it?
> I have talked to Ehud, and lived.
> -- > SYSMGR@CADLAB.ENG.UMD.EDU < --
Doug,
Just to clear up one point in your response, there is no license for the use
of TURBOchannel. It is completely free to both System and Option vendors. In
point of fact, Digital no longer controls the specification. For almost the
past two years the specification has been controlled by the TURBOchannel
Industry Group. Specification changes are voted upon by the membership and are
approved by the Steering Committee (9 members of which DEC has 1 vote). In any
case, there is no hinderance for anybody using the TURBOchannel technology.
Actually, I personally find a great deal of merit in the COMPAQ proposal. I
quite agree that a modular I/O design (whether one uses the terminology of a
"star topology" or, as we do here in DEC, "radial") has a great deal to
recommend it. Consider a TURBOchannel implementation like this:
------------ -------
| | | |
| Memory |========| CPU |
| | | |
------------ -------
| |
| <--- DMA |
| |
---------- | <--- PIO
| | |
| Tc/CTL |--------------
-------| |_________________________
/ ---------- |
/ | | |
/ | |___________ |
/ | | |
/ | | |
------- ------- ------- -------
| | | | | | | |
|sysIO| | Tc0 | | Tc1 | | Tc2 |
| | | | | | | |
------- ------- ------- -------
Where each of the links to the TURBOchannel Controller (Tc/CTL) is a standard
25MHz 32bit wide TURBOchannel. The DMA path could be a 50MHz 64bit wide version
of TURBOchannel (in order to balance the I/O requirements. This would generate
a system with an aggregate bandwidth of 400MB/s of I/O. The key point here is
obviously the Tc/CTL ASIC as it will require careful design to support this
kind of bandwidth (additionally, one could imagine a true dual ported memory
being used such that the CPU is not starved when DMA access is underway).
This is a potential high end workstation style design where:
sysIO - Is a collection of all of the base module I/O. SCSI, Ethernet, ISDN,
Audio, ACCESS.bus, Synch/Asynch comm, Centronics and so on. At 100MB/s.
Tc0 - Is a completely radial TURBOchannel at 100MB/s.
Tc1 - Is a completely radial TURBOchannel at 100MB/s.
Tc2 - Is a completely radial TURBOchannel at 100MB/s.
The benefits of this in terms of really high speed graphics or networks is an
obvious one. Given a sufficiently powerful design of the Tc/CTL ASIC, an option
should be able to depend upon a given bandwidth and latency (response to a DMA
~rReq or ~wReq ought to be immediate). Video teleconferencing and other such
high bandwidth consumers ought to do very well with such a system.
Given that one needed to increase the bandwidth even further, one could make
the radial TURBOchannels (Tc0, Tc1, Tc2) into speed selectable versions (this
is briefly described in a TURBOchannel presentation I put up on gatekeeper over
a year ago in gatekeeper:pub/DEC/TriAdd/TURBO.PS) that can run at either
25MHz or at 50MHz. This would insure all the old options would be compatible
and that any new option could have a full 200MB/s throughput if it is needed.
We know that TURBOchannel works at this kind of throughput because we use
variants of TURBOchannel (different versions of datapath width and freuency)
internally on several of our designs.
A low end version of this (with an enclosure something like a DEC 3000/500)
might have a single TURBOchannel that covered the base system I/O and three of
the TURBOchannel slots (for all of the slow speed stuff that won't break 40MB/s
or so) and could still have three complete radial (speed selectable or not)
TURBOchannels for the other three option slots (the DEC 3000/500 has 6 slots
that are customer configurable).
This kind of an implementation puts a one-time cost into the Tc/CTL versus a
shared-wide fully bussed interconnect which puts such a cost into each of the
add in cards as well. Plus, with a full bussed interconnect you will be using
the same resource for your SCSI system disk that you are trying to run high
speed video images across.
In any case, none of the above discussion guarantees that Digital is (or isn't)
developing anything like this. It's just my own personal views on the topic.
Sorry for the long soapbox discussion. I had originally intended to just clear
up the use of the term license and I got carried away.
I hope that helps.
Thanx,
AJ
**********************************************************************
* AJ Casamento "The question is not whether or *
* Digital's TRI/ADD Program not the opinions are mine; but *
* 529 Bryant Ave. PAG-2 rather, which of my personalities *
* Palo Alto, CA 94301-1616 do they belong to?" *
* 415.617.3460 *
* ajc@pa.dec.com *
**********************************************************************
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Path: arc1-ca.pugleaf.net!sparky!uunet!haven.umd.edu!decuac!pa.dec.com!granite.pa.dec.com!ajc From: ajc@pa.dec.com (AJ Casamento) Newsgroups: comp.arch Subject: Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE Date: 16 Dec 92 11:22:32 Organization: Digital Equipment Corporation Lines: 128 Message-ID: <AJC.92Dec16112232@thendara.pa.dec.com> References: <1992Dec15.171554.2781@twisto.eng.hou.compaq.com> <1992Dec15.194637.10009@eng.umd.edu> NNTP-Posting-Host: thendara.pa.dec.com In-reply-to: sysmgr@king.eng.umd.edu's message of 15 Dec 92 19:46:37 GMT