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Article #11185Re: 100 Mips Intel NeXT (processor comparison)
From: Wayne Schlitt
Date: Thu, 31 Dec 1992 13:49
Date: Thu, 31 Dec 1992 13:49
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In article <1992Dec31.022317.17674@wam.umd.edu> rsrodger@wam.umd.edu (Yamanari) writes: > > > >Don't be surprised if CPU's start coming out with 1 meg of onboard cache > >within the next year... > > > Is this really likely, given the complexity (according to > net rumor) already involved in fabricating the Alpha? If "onboard" means "on the motherboard", then yes, I would expect that some of the high end alpha systems will probably have 1MB of cache. If "onboard" means "on the chip", then no, you will not see cache sizes like that for at least 5 years. The standard DRAM is 4Mbit, which is .5MByte, so fabrication techniques aren't even up to having that much memory along with a cpu on a chip, let alone having that memory be fast SRAM. (what's the current SRAM density nowadays anyway?) -wayne
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Newsgroups: comp.arch Path: arc1-ca.pugleaf.net!sparky!dsndata!backbone!backbone!wayne From: wayne@backbone.uucp (Wayne Schlitt) Subject: Re: 100 Mips Intel NeXT (processor comparison) In-Reply-To: rsrodger@wam.umd.edu's message of Thu, 31 Dec 1992 02: 23:17 GMT Message-ID: <WAYNE.92Dec31074958@backbone.uucp> Sender: wayne@backbone (Wayne Schlitt) Organization: The Backbone Cabal References: <1992Dec24.190008.25875@ohsu.edu> <BzvJys.CwD@cs.mcgill.ca> <1992Dec31.013141.132685@zeus.calpoly.edu> <1992Dec31.022317.17674@wam.umd.edu> Date: Thu, 31 Dec 1992 13:49:58 GMT