Article View: comp.arch
Article #11194Re: branch-and-link
From: Andy Glew
Date: Fri, 01 Jan 1993 00:29
Date: Fri, 01 Jan 1993 00:29
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Here's a question for the hardware types: is there any reason either of
design complexity or performance to not have *all* branches (conditional
and unconditional) save their origin somewhere (probably in a fast
dedicated register)? I know various cpu's (the rs6000?) have done this
in the past, but only as an option. If there is no negative impact to
doing this, it would be a real win for debugging crashes where a program
(application or kernel) branch off to nowhere and die - and the poor S/W
type is left guessing...
Make it an option, specific to a model.
Some microarchitectures can do it easily.
Other, quite reasonable, microarchitectures can't do it at all without
slowing down (or requiring a PC to be attached to every instruction as
it flows through the pipe).
When you can do it, great! But don't slow down other implementations
for a debug feature that is not in use most of the time.
--
Andy Glew, glew@ichips.intel.com
Intel Corp., M/S JF1-19, 5200 NE Elam Young Pkwy,
Hillsboro, Oregon 97124-6497
This is a private posting; it does not indicate opinions or positions
of Intel Corp.
Intel Inside (tm)
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Newsgroups: comp.arch Path: arc1-ca.pugleaf.net!sparky!uunet!spool.mu.edu!agate!stanford.edu!enterpoop.mit.edu!eff!ssd.intel.com!ichips!ichips!glew From: glew@pdx007.intel.com (Andy Glew) Subject: Re: branch-and-link In-Reply-To: dswartz@sw.stratus.com's message of 27 Dec 92 17:54:11 GMT Message-ID: <GLEW.92Dec31162920@pdx007.intel.com> Sender: news@ichips.intel.com (News Account) Organization: Intel Corp., Hillsboro, Oregon References: <1hkqk3INNsns@transfer.stratus.com> Date: Fri, 1 Jan 1993 00:29:20 GMT Lines: 30