🚀 go-pugleaf

    On a related note (vis-a-vis debugging ease) to the branch-and-link issue, another peeve
    I've always had is that no commercially available processors (that I know of) make NULL
    pointer detection easy withou serious run-time overhead.  Various OS's try by unmapping
    the first N pages of memory, which works fine until you run into a chip like the 68030,
    which supports huge displacements.  Not to mention if the index register pushes the
    effective address out of your protected window, you're hosed.  If you have a standard
    base_reg+index_reg+disp format, it would seem to me that having the processor check the
    base register for NULL and faulting if it is wouldn't be that hard (or inefficient).
    Especially if NULL happens to be zero on that machine.

Rather contradicts another thread.

Compilers can perform significantly more optimizations if accesses
to address 0 (and neighbourhood) are guaranteed not to fault.

See:

    "Proving safety of speculative load instructions at compile time"
    David Bernstein
    Michael Rodeh
    Mooly Sagiv
    IBM Israel
--

Andy Glew, glew@ichips.intel.com
Intel Corp., M/S JF1-19, 5200 NE Elam Young Pkwy, 
Hillsboro, Oregon 97124-6497

This is a private posting; it does not indicate opinions or positions
of Intel Corp.

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