🚀 go-pugleaf

In article <JAN.92Oct30175815@pallas.neuroinformatik.ruhr-uni-bochum.de>, jan@pallas.neuroinformatik.ruhr-uni-bochum.de (Jan Vorbrueggen) writes:
|> In article <Bwx4pF.8ur@rice.edu> preston@dawn.cs.rice.edu 
|> (Preston Briggs) writes:
|>    
|>    The advantage doesn't hold up when
|>    compared against 3address code after optimization.  Sure, you can do
|>    a simple treelike expression with very few instructions; but when you
|>    try and handle reuse (DAGs and such), you end up spending a lot more
|>    instructions shuffling operands to and from the TOS.  Work an example
|>    like DAXPY.  
|>    
|> Okay, let's do that. I'll take my (D|S)AXPY code (makes one byte difference)
|> for the T800. I'll take the basic loop block, unrolled 8 times, and count all 
|> instructions (including loop overhead). First, let's have a look at the work
|> required:
|> 
|> 2 fp ops per element (mul, add) = 16 ops
|> 2 loads per element             = 16 ops
|> 1 store per element             =  8 ops
|>                                  +++++++
|>                                   40 ops
[plus 2 for loop overhead]
[stuff deleted]
|> Finally, the conditional branch is formulated in my code to require two
|> instructions (three bytes). The whole loop thus requires 91 ops and 131 bytes.
|> (The D version needs one more byte.)

[quote from Briggs deleted]
|> So we have 91/42=2.2 times as many instructions, requiring 131/164=.8 the
|> overall size, so their _average_ size is .37 of the nonstack machine.
|> The .37 is probably abnormally high (compared to the rest of a "real" 
|> programme), as the loop contains many fp ops.
[Another quote from Briggs deleted]
|> Well, the T9000, running at 50MHz, can theoretically do 4bytes/cycle
|> (limited by bandwidth to the instruction fetcher) or bursts of 8 ops
|> per cycle with all functional units going at full speed. Whether Inmos
|> can crank the speed up to 200MHz (or whether they even want to, given that
|> they want to keep the balance between computation and the speed of the
|> communications links), is anybody's guess...
|> 
|> 	Jan
|> 
|> Jan Vorbrueggen, Institut fuer Neuroinformatik, RuhrUniversitaet Bochum, FRG

   Thank you, Jan, for that very interesting comparison. It seems to say that
on the DAXPY loop, the stack machine requires 2.2 times as many clocks as the
register machine. One small quibble: both the Intel i860 and the IBM RS/6000
architecture have muladd instructions that can be issued every clock, so the
opcount on those architectures would be 32, not 40; also the size would be less.
One question: is the T9000 for sale yet? I know it was announced a year ago, but
the last I heard it still wasn't released.
					- Lee Campbell  <elwin@media.mit.edu>