🚀 go-pugleaf

In comp.arch you write:

>mike@cbl.umd.edu (Michael Santangelo) writes:

>>Can EISA, MicroChannel, or the new VESA LocalBus on PC's allow
>>multiple controllers plugged into them (say two smart bus mastering
>>SCSI disk controllers on one of these buses) xfer data simultaneously
>>to main memory (DMA)?
>Both EISA and MicroChannel support the concept of multiple preemptable
>bus masters. In the case of EISA, the system DMA controller also behaves
>like a bus master. EISA arbitrates round robin. MicroChannel arbitrates
>priority-based, but degenerates to round-robin once the "fairness feature"
>is turned on.
>Therefore e.g. an SCSI controller and an FDDI network controller can
>xfer data "simultaneously" to/from main memory on these buses. Of course
>the bus is a shared medium, so the devices will "fight" for the bus
>and share the available bandwidth with some of the bandwidth lost due to
>the preemption/re-arbitration overhead.

So this theoretical EISA SCSI controller and this theoretical EISA FDDI
controller could both be doing DMA writes to main memory (interleaving their
accesses I assume)?  Since PC's do not have multiport memory, I assume
the EISA subsystem would itself (on behalf of BOTH of these controllers) have
full control over the memory during the dual transfers, starving out the CPU?

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Michael F. Santangelo                 + Internet: mike@cbl.umd.edu
Computer & Network Systems Director   +           mike@kavishar.umd.edu
UMCEES / CBL (Solomons Island)        + BITNET:   MIKE@UMUC
University of Maryland                + Voice:    (410) 326-7237 (direct)
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Michael F. Santangelo                 + Internet: mike@cbl.umd.edu
Computer & Network Systems Director   +           mike@kavishar.umd.edu
UMCEES / CBL (Solomons Island)        + BITNET:   MIKE@UMUC