Article View: comp.arch
Article #11285Re: Registerless processor
From: Richard Snider
Date: Thu, 19 Nov 1992 01:32
Date: Thu, 19 Nov 1992 01:32
20 lines
1390 bytes
1390 bytes
In article <1992Nov13.181654.11692@fcom.cc.utah.edu> drdavis@u.cc.utah.edu (Darren R. Davis) writes:
>I have been pondering an idea for a machine architecture. A processor
>that has no registers. I am familiar with some architectures that have
[...]
>fast access. Does anyone know of such a machine, and what are your
>thoughts on this kind of architecture.
The PDP-10 could fall into this classification without too much arguing.
It had its set of 16 general purpose registers defined simply as the
first 16 locations in memory. Naturally, they implemented the the
"registers" as logic (register files) rather than core (in the first
ones). The secret way to get your program to run really fast in
a tight loop was to load it into the registers (up to 16 instructions)
and then jump to one of the registers......
Ok, so its not so fast nowadays.... .....but still kinda neat
...Rich
rsnider@xrtll
Technical Details
Message-ID:
<BxxwAq.G8C@xrtll.uucp>Path:
arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!uunet.ca!geac!itcyyz!xrtll!rsniderReferences:
<1992Nov13.181654.11692@fcom.cc.utah.edu>Show Full Headers
Complete Article Headers
Newsgroups: comp.arch Path: arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!uunet.ca!geac!itcyyz!xrtll!rsnider From: rsnider@xrtll.uucp (Richard Snider) Subject: Re: Registerless processor Organization: WCOM Public Access Unix - Toronto Date: Thu, 19 Nov 1992 01:32:49 GMT Message-ID: <BxxwAq.G8C@xrtll.uucp> References: <1992Nov13.181654.11692@fcom.cc.utah.edu> Lines: 21