Article View: comp.arch
Article #11297Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE
From: AJ Casamento
Date: Fri, 01 Jan 1993 18:29
Date: Fri, 01 Jan 1993 18:29
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3368 bytes
In article <BzoL0q.3zr.2@cs.cmu.edu> lindsay+@cs.cmu.edu (Donald Lindsay)
writes:
>>ajc@pa.dec.com (AJ Casamento) writes:
>>> I guess I not as upset by the concept of using an ASIC. Of course, I'm not
>>>talking about respinning a full custom ASIC for each new design either.
>>I would expect that the ASICs could become cheap, and would have a lot
>>in common internally.
>>However, ASICs have a lead time. If Compaq is serious about spreading
>>this as a standard, then they should make available a
>>common-denominator design based on common parts, or on FPGAs.
>>Something that lets people get their feet wet, at the very least.
Don,
We do exactly this in the TURBOchannel Developer's Kit. It provides:
* A functional TURBOchannel Option (capable of both DMA and PIO)
* Schematics for the Option design
* State machine diagrams for the design
* PAL equations for the TURBOchannel interface logic
* A BOM (Bill Of Materials) using all external part numbers
* Source code for the Option ROM (the ROM is socketed)
* A ROM developer's guide/example
* Source code for the device drivers (currently Ultrix & OSF/1 with
VMS, OpenVMS and Alpha AXP OSF/1 drivers coming)
This is intended to provide a designer with all of the building blocks that
it took to build this option. You can install the option and play with the
functionality and then try developing your own Option ROM and device driver to
test against the Option as well (all of the standard TURBOchannel documentation
is included in the kit).
However, my point was that COMPAQ could also provide a common interface ASIC,
equivalent to the TcIA, that would provide a very cheap cut and paste logic for
Option card vendors that would provide a lowest risk path for migrating their
current designs to this new interconnect. By arranging an agreement with some
ASIC vendor to provide the same ASIC design as a mega-cell they would also be
enabling those vendors with a need for tightly integrated performance designs
to easily migrate. Their version of a common interface ASIC ought to be very
cheap given the datapath size. I highly recommend this alternative.
Still just my own view, of course.
Thanx,
AJ
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* Digital's TRI/ADD Program not the opinions are mine; but *
* 529 Bryant Ave. PAG-2 rather, which of my personalities *
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* ajc@pa.dec.com *
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Path: arc1-ca.pugleaf.net!sparky!uunet!wupost!usc!elroy.jpl.nasa.gov!decwrl!pa.dec.com!granite.pa.dec.com!ajc From: ajc@pa.dec.com (AJ Casamento) Newsgroups: comp.arch Subject: Re: COMPAQ PROPOSED SCALABLE I/O ARCHITECTURE Date: 1 Jan 93 18:29:33 Organization: Digital Equipment Corporation Lines: 61 Message-ID: <AJC.93Jan1182933@thendara.pa.dec.com> References: <1992Dec17.190553.17417@twisto.eng.hou.compaq.com> <1992Dec18.100700.62150@cc.usu.edu> <AJC.92Dec19132456@thendara.pa.dec.com> <BzoL0q.3zr.2@cs.cmu.edu> NNTP-Posting-Host: thendara.pa.dec.com In-reply-to: lindsay+@cs.cmu.edu's message of 22 Dec 92 21:58:00 GMT