🚀 go-pugleaf

In article <1992Nov18.210416.27212@nntpd.lkg.dec.com>,
dipirro@star.dec.com (Steve DiPirro) writes:
> 
> In article <1992Nov18.112407.2518@doug.cae.wisc.edu>,
keiths@cae.wisc.edu (Keith Scidmore) writes...
> >2. The Alpha architecture also includes a feature they call PALcode that
> >   allows the chip to have a sort of rom-bios.  Why is it useful to have
> >   this feature?  Supposedly Operating systems can make use of this for
> >   the implementation of certain system calls.
> 
> PALcode allows for the implementation of uniprocessor-atomic
> "instructions" which are actually a sequence of Alpha instructions.
> It allows the architecture to remain pure RISC and not compromise
> performance to implement some complex instructions. This was very
> useful in the port of VMS to Alpha.

Can you explain how this is different from kernel code with interrupts
disabled on any other risc processor? For instance, an R4000 can
implement uniprocessor-atomic "instructions" which are sequences of
MIPS instructions to implement complex functions by running code
in kernel level with interrupts switched off.

> 
> Take the VAX REI instruction as an example. This is a very complex
> VAX instruction and is implemented in PALcode on Alpha (for VMS).
> So there is no need to burden the base architecture with the
> implementation of an REI instruction. Instead, you have a "subroutine"
> of sorts which executes in the special PALcode environment.
> 
> Very few PALcode instructions were actually needed to port VMS to
> Alpha, but some we could not do without (without considerable work,
> that is).
> 
> PALcode is also a convenient place to handle device interrupts and
> exceptions and provide the expected OS interfaces at that level.
> Specific OS knowledge can also be built into PALcode, such as pagetable
> formats, etc. allowing such things as TB invalidates to be handled
> by PALcode. For VMS, PALcode also handles unaligned data reference
> fixups, providing an optional exception through the SCB when one occurs.
> 
> ------------
> Steve DiPirro        dipirro@star.dec.com
>                      --or-- ...!decwrl!star.dec.com!dipirro
>                      --or-- dipirro%star.dec@decwrl.dec.com
> ------------

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