Article View: comp.arch
Article #11332Re: Registerless processor
From: Theo de Raadt
Date: Fri, 20 Nov 1992 06:11
Date: Fri, 20 Nov 1992 06:11
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In article <BxxwAq.G8C@xrtll.uucp> rsnider@xrtll.uucp (Richard Snider) writes: The PDP-10 could fall into this classification without too much arguing. It had its set of 16 general purpose registers defined simply as the first 16 locations in memory. Naturally, they implemented the the PDP11 registers map into the memory address space as well. There are two banks of 8 registers, though which can be accessed depends on a bits in the status register. I wonder how this was implimented? I guess that in the early PDP11's the registers did not exist at all. But certainly they must have fixed that in later versions. Was it possible to run programs out of the registers on a newer PDP11? <tdr. -- This space not left unintentionally unblank. deraadt@newt.cuc.ab.ca
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Newsgroups: comp.arch Path: arc1-ca.pugleaf.net!sparky!uunet!cis.ohio-state.edu!zaphod.mps.ohio-state.edu!sol.ctr.columbia.edu!destroyer!cs.ubc.ca!unixg.ubc.ca!kakwa.ucs.ualberta.ca!alberta!cpsc.ucalgary.ca!xenlink!newt.cuc.ab.ca!deraadt From: deraadt@newt.cuc.ab.ca (Theo de Raadt) Subject: Re: Registerless processor In-Reply-To: rsnider@xrtll.uucp's message of Thu, 19 Nov 1992 01: 32:49 GMT Message-ID: <DERAADT.92Nov19231103@newt.newt.cuc.ab.ca> Sender: news@newt.cuc.ab.ca Nntp-Posting-Host: newt Organization: little lizard city References: <1992Nov13.181654.11692@fcom.cc.utah.edu> <BxxwAq.G8C@xrtll.uucp> Date: Fri, 20 Nov 1992 06:11:03 GMT Lines: 17