🚀 go-pugleaf

In article <1992Nov19.204209.6619@nntpd.lkg.dec.com> dipirro@star.dec.com  
(Steve DiPirro) writes:
> 
> In article <lgnfc3INNqnt@spim.mti.sgi.com>, woodacre@mips.com (Michael  
Woodacre) writes...
> >In article <1992Nov18.210416.27212@nntpd.lkg.dec.com>,
> .. . .
> >Can you explain how this is different from kernel code with interrupts
> >disabled on any other risc processor? For instance, an R4000 can
> >implement uniprocessor-atomic "instructions" which are sequences of
> >MIPS instructions to implement complex functions by running code
> >in kernel level with interrupts switched off.
> 
> There are certainly similarities. PALcode "instructions" actually appear
> as single instructions in the Istream which is handy for debuggers, etc.
> PALcode runs with interrupts disabled, Istream memory management traps
> disabled, and complete control over machine state. The environment allows
> more flexibility and more possibilities than merely running in the  
"standard"
> environment with interrupts disabled.

This is true of trap/syscall instructions on the R3000, R4000, and R6000 as  
well. You will need properly written exception handlers to get all the  
benefits, but PALcode has to obey many constraints as well. I'm going to  
have to look at the details, but MIPS syscall may in fact conform to the  
PALcode architecture. I can't find where the Alpha arch. defines any  
functions which must be available only in PALmode.

If you really want an extra "privillege" level for "more flexibility and  
possibilities" (whatever those may be), you can add one without touching a  
single byte of user code. (the Alpha PALcall instruction looks almost  
exactly like the MIPS syscall instruction to an application.) If I  
understood Joel Boney's SPARC version 9 talk, they have something simillar  
to PAL mode in their privelleged architecture. Supposedly for reliability  
purposes more than anything else.

Like I said before, PALmode is more about usage than mechanism. (And it has  
to be on Alpha given that most of the mechanism is implementation specific.) 

(I use the MIPS architecture above because it is the one I am most familliar  
with. You may be able to substitute your favorite arch. without loss of  
generality :-))
--
Zalman Stern		   zalman@adobe.com		    (415) 962 3824
Adobe Systems, 1585 Charleston Rd., POB 7900, Mountain View, CA 94039-7900
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