🚀 go-pugleaf

RetroBBS NetNews Server

Inspired by RockSolid Light RIP Retro Guy

Article View: comp.arch
Article #11378

Alpha AXP PALcode

#11378
From: Bob Supnik
Date: Fri, 20 Nov 1992 22:05
56 lines
3518 bytes
The PAL mechanism in the AXP architecture was intended to allow for
abstraction of privileged operations such as memory management, interrupts,
exceptions, privileged instructions, system start, and system halt, so that

a) operating systems would see consistent operations from chip to chip,
b) the chips would be free to vary the underlying hardware, and
c) the set of privileged functions could vary among operating systems.

To this end, the architecture defines that events relating to memory
management, interrupts, exceptions, privileged instructions, system start,
and system halt are handled by a library or layer of code, called the
Privileged Architecture Library.  Using either standard or special resources
in the chip, PAL must be able to provide the service or handling required
by the operating system model.

As a mechanism, PAL typically is implemented as an orthogonal 'state' to
the normal protection model.  When in PAL 'state', the system:

a) may have access to extra instructions, which will be implementation specific
b) may have access to special registers, which will be implementation specific
c) operates with interrupts disabled
d) operates without (further) instruction stream TLB misses or exceptions

PAL differs from a kernel mode exception in that no transition of either the
visible memory management state or the visible interrupt state.  Loads and
stores are checked against the prevailing mode at the time of invoking PAL,
not against kernel mode.  The interrupt system can be queried for pending
interrupts. 

PAL is typically provided as part of the console/bootstram ROM.  Thus, it
is loaded into memory during boot time and appears to the operating system
as part of the 'BIOS' or instruction set.

The advantages of PAL are:

a) the large number of implementation specific registers needed to control
   the chip or recover from errors are hidden from the operating system
b) privileged facilities can be tailored to an operating system's natural
   model or preferences
c) underlying hardware for privileged operations can be changed dramatically
   from implementation to implementation without changing the operating system
d) it provides the right control points to virtualize the architecture without
   ring compression, even for 4-ring software systems like VMS

Some examples of b)  In VMS, many VAXisms such as REI and interlocked queues
are provide via PALcode.  The fact that PAL routines run in the protection
mode of the caller, rather than in kernel, makes this emulation feasible.
In Windows NT, the operating system has a 'hardwired' belief that page table
entries are 32b wide.  In Alpha AXP, they are 64b wide.  Since the TLB
service routine is in PAL, dynamic expansion from 32b to 64b is done there,
and extensive source code changes were avoided.

Bob Supnik	>Supnik@human.enet.dec.com
		>All opinions expressed are those of a hardline microcoder
		>and do not reflect those of Digital Equipment Corporation
Technical Details
Message-ID: <2249@sousa.tay.dec.com>
Path: arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!cs.utexas.edu!sun-barr!decwrl!deccrl!news.crl.dec.com!dbased.nuo.dec.com!nntpd.lkg.dec.com!sousa.tay.dec.com!human.enet.dec.com!supnik

Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!zaphod.mps.ohio-state.edu!cs.utexas.edu!sun-barr!decwrl!deccrl!news.crl.dec.com!dbased.nuo.dec.com!nntpd.lkg.dec.com!sousa.tay.dec.com!human.enet.dec.com!supnik
From: supnik@human.enet.dec.com (Bob Supnik)
Newsgroups: comp.arch
Subject: Alpha AXP PALcode
Summary: PALcode purposes
Keywords: AXP, PALcode
Message-ID: <2249@sousa.tay.dec.com>
Date: 20 Nov 92 22:05:19 GMT
Sender: newsa@sousa.tay.dec.com
Organization: Digital Equipment Corporation
Lines: 56