🚀 go-pugleaf

willmore@iastate.edu (David Willmore) writes:
keiths@cae.wis> c.edu (Keith Scidmore) writes:
> 
> >1. The DEC Alpha includes a conditional move instruction that they claim
> >   can be used to avoid using branches and the associated branch penalties.
> >   I'm trying to evaluate the usefulness of this feature.  Can someone tell
> >   me where I might find articles that discuss this or raw data that can be
> >   used to calculate the advantages of such an instruction.  I'm not into
> >   compilers, and I need to know what kinds of situations an optimizing
> >   compiler could make use of this instruction.  Is it even practical?  Are
> >   there any compiler writers out there with opinions on this?
> 
> You might try asking the HP people.  They were discussing the benefit of
> their conditional execution 'branches'.  Other people to ask, if you're
> brave enough, are the ARM people.  In their assembler, almost every inst.
> is conditional.

If one checks Guri Sohi's litterature, they will find that many architects
are rushing to find mechanisms to deal with these situations.  In particular,
almost all of these situations manifest themselves in where a small number
of instructions are skipped by a short forward branch.  Depending on the scale
of the fetch machine, the target of the branch instruction may already be inbound
from the instruction cache.  In these cases, there is no faster way to arrive
at the target of the branch than simply to wait for these instruciton to 
arrive.  THERE IS NO REASON TO DISRUPT THE FETCH MACHINE!  In onder to 
effect the taking or not taking of the branch, one must be able to identify
those instructions in the shadow of the branch.  When one determines the 
outcome of the branch, then one can execute these instructions or discard
them.  THERE IS NOT REASON TO BACK UP THE MACHINE DUT TO THE SHORT FORWARD
BRANCH MISPREDICTION!

This means that branches are predicted accordint to three patterns; short forward
branches are predicted to be not taken and execution canceled follwing branch
determination, other branches are predicted and the machine is backed up on a
misprediction.  The key payoff is that the short forward branches are manipulated
ins such a way as to avoid disrupting the fetch machine.  The number of instructions
under the short forward branch is implementation dependent as it should be!

The addition of conditional move/... instrucitons is a cluttering of instruciton
sets and their decoders.

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Mitch Alsup        mitch@ross.com
(512)-892-7802x231 ROSS Technology
(512)-263-5086     Evenings
Disclaimer:        I speak for myself.
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