Article View: comp.arch
Article #11440Re:2.5 Addr Archs
From: abaum Allen Baum
Date: Thu, 09 May 1991 10:31
Date: Thu, 09 May 1991 10:31
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(D. Richard Hipp) writes: >I once proposed an architecture that featured "2.5" addresses... > Each instruction contains two register numbers, plus one extra bit >which indicated whether the ... (destination) should be the >same as A or should be register zero (the accumulator) >This was only an idea, and was never tested. I would be interested to hear >if John Van Zandt, or anyone else, has ever looked at this addressing scheme >and what they found after looking at it for a while. The ATT CRISP has instructions of this form, as did the Lawerence Livermore Labs S-1 machine.
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!samsung!uunet!mcsun!ukc!acorn!armltd!abaum From: abaum (Allen Baum) Newsgroups: comp.arch Subject: Re:2.5 Addr Archs Message-ID: <165@armltd.uucp> Date: 9 May 91 10:31:15 GMT References: <673707950@romeo.cs.duke.edu> Sender: abaum@armltd.uucp Distribution: comp Organization: A.R.M. Ltd, Swaffham Bulbeck, Cambs, UK Lines: 15