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Article #11745

Re: ieee floating standard

#11745
From: Hugh LaMaster
Date: Wed, 22 May 1991 22:18
69 lines
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In article <9105220041.AA14355@ucbvax.Berkeley.EDU>, jbs@WATSON.IBM.COM writes:
|> 
|>          Richard O'Keefe says:
|> Given that the same posting has already beaten Herman Rubin over the
|> head with the IEEE

|>          Let me explain what I meant.  When I stated that the IEEE
|> standard has become so entrenched that manufacturers are effective-
|> ly forced to use it,

But, the reason that the standard is so entrenched is that it is so useful!
Manufacturers are forced to use it because users have requirements for it.


What has gotten lost in this discussion is that IEEE floating point has been
a tremendous boon to both users and the industry.  IEEE is important to users
for two reasons:

1)  It is a standard.  It is very important to certain users to be able to
move binary data between machines without conversion.  It has also become a
reference standard which can be incorporated in other interoperability uses,
such as XDR, the same way that ASCII became useful in telnet, for example.
While this applies mainly to the representation, it is also the case that
the arithmetic definition itself is very useful, because it implies that in
most reasonable cases, you will get exactly the same answer on different
machines when you move your program.  I wish that Cray would use it.
There are always programs which run on the ragged edge of precision,
and which don't work right on a slightly poorer implementation.

2)  IEEE is very well behaved, compared with other representations.  I won't
bother to substantiate this, other than to state that many experts agreed
at the time it was developed that there was no known way to improve it 
numerically.


Users and industry have both benefitted tremendously, because it has
permitted standard parts to find their way into low cost PC's and workstations.



The down side of IEEE is a performance hit in heavily pipelined FP units, for
some input values.  On the other hand, it is nice to get the right answer, even
if some cases slow down.


The usefulness of IEEE to support extended precision integer arithmetic is
of interest, but, with today's technology, there is probably a better way
to support thiis.  It would not be difficult to put in a 32x32 -> 64
integer double length multiplier.  As has been noted, in the CDC 6600, the fp unit
could be used to multiply 48 bit significands and get 96 bit results.  I believe
that machines of that vintage used 10-30K gates for such a multiplier. Surely such
a double length multiplier, which is what is needed to support 
extended precision arithmetic, would not be too many extra gates in one of 
those new 1.5 Million transistor chips?  

Even a 64 bit double length multiplier won't be that big a deal in the near
future.  I figure it ought to take less than 100K transistors for a fast
64 bit double length multiplier. Since some vendors are claiming they won't
know what to do with all 10 Million transistors/chip available in 1995, adding
an extra 1% should not be a big deal. 


|>                         James B. Shearer

-- 
  Hugh LaMaster, M/S 233-9,  UUCP:                ames!lamaster
  NASA Ames Research Center  Internet:            lamaster@ames.arc.nasa.gov
  Moffett Field, CA 94035    With Good Mailer:    lamaster@george.arc.nasa.gov 
  Phone:  415/604-1056                            #include <std.disclaimer> 
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From: lamaster@pioneer.arc.nasa.gov (Hugh LaMaster)
Newsgroups: comp.arch
Subject: Re: ieee floating standard
Message-ID: <1991May22.221824.16887@riacs.edu>
Date: 22 May 91 22:18:24 GMT
References: <9105220041.AA14355@ucbvax.Berkeley.EDU>
Sender: news@riacs.edu
Reply-To: lamaster@pioneer.arc.nasa.gov (Hugh LaMaster)
Organization: RIACS, NASA Ames Research Center
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