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Article #11769Teraplex MISC: what does(did) it look like?
From: Mauricio Breternitz
Date: Thu, 23 May 1991 19:05
Date: Thu, 23 May 1991 19:05
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Now that Teraplex is gone, can we know more details about their MISC architecture ? To me it sounded like a VLIW-ish architecture, but I was unable to get enough info to discern their key distinguishing features. No evidence of good compiler support for their apparent fine-grained parallelism either. Any info appreciated, Mauricio -- Mauricio Breternitz | Disclaimer: Carnegie-Mellon University | Pittsburgh PA 15221 | this message contains no disclaimer. mbjr@fiero.ece.cmu.edu |
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arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!ispd-newsserver!kodak!rochester!pt.cs.cmu.edu!o.gp.cs.cmu.edu!fs7.ece.cmu.edu!fiero.ece.cmu.edu!mbjrShow Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!ispd-newsserver!kodak!rochester!pt.cs.cmu.edu!o.gp.cs.cmu.edu!fs7.ece.cmu.edu!fiero.ece.cmu.edu!mbjr From: mbjr@fiero.ece.cmu.edu (Mauricio Breternitz) Newsgroups: comp.arch Subject: Teraplex MISC: what does(did) it look like? Message-ID: <1991May23.190534.13100@fs7.ece.cmu.edu> Date: 23 May 91 19:05:34 GMT Sender: news@fs7.ece.cmu.edu (USENET News System) Organization: Electrical and Computer Engineering, Carnegie Mellon Lines: 18 Originator: mbjr@fiero.ece.cmu.edu