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Article #11981

Re: iWarp Architecture Overview

#11981
From: David Boreham
Date: Fri, 07 Jun 1991 14:13
27 lines
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In article <2622@m1.cs.man.ac.uk> mshute@cs.man.ac.uk (Malcolm Shute) writes:
>Am I correct in assuming that this is Intel's answer to Inmos' Transputer?  

Hey I've never been able to understand what's wrong with 
a 68K and four UARTs -:)

Although comparisons are clearly going to be made, I don't believe
that the iWARP and Transputer are trying to solve the same
problems. Similarly for the TMS320C40 (perhaps more interesting
than the iWARP, save the lack of routing).                        

The more guys there are out there with silicon supporting 
message-based MIMD systems, the better as far as I'm concerned.
The field is so devoid of useful solutions that there's plenty
of scope for offering different features which fit different 
application areas. eg different communications speed/pins used,
different CPU types (vector, scalar, FP, large, small...),
different routing capabilities (good for <10 CPU, good for >1000 CPU...),
different virtual channel capabilities (none, a few, many...).


Oh, Jeff---check out which side of the road they drive on in Japan :^).


David Boreham, INMOS Limited | mail(uk): davidb@inmos.co.uk or ukc!inmos!davidb
Bristol,  England            |     (us): uunet!inmos.com!davidb
+44 454 616616 ex 547        | Internet: davidb@inmos.com
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From: davidb@inmos.co.uk (David Boreham)
Newsgroups: comp.arch
Subject: Re: iWarp Architecture Overview
Message-ID: <16477@ganymede.inmos.co.uk>
Date: 7 Jun 91 14:13:36 GMT
Sender: news@inmos.co.uk
Reply-To: davidb@inmos.co.uk (David Boreham)
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