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Article #12108Re: More on Linpack pivoting: isamax and instruction set design
From: Bob Bentley
Date: Fri, 14 Jun 1991 18:30
Date: Fri, 14 Jun 1991 18:30
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1654 bytes
In article <1991Jun14.134338.4673@linus.mitre.org> bs@frieda.mitre.org (Robert D. Silverman) writes: > >I also have never seen a machine that has conditional assignment >implemented as an instruction! ....... What machine is this? >Could you show us the assembler syntax?? > The Intel i960(tm) architecture has a limited type of conditional assignment in the form of the TEST instructions, which are used to test the condition code and set a boolean value in a register. They are intended primarily for implementing C statements of the form: a = b > c without having to do conditional branches. The assembler code might look like: cmpo r5, r6 testg r4 which causes r4 to be set to 0 or 1 depending on the result of the comparison. See any 80960 Programmers Reference Manual or the Myers & Budde book for more details. Bob Bentley Intel Corp., M/S JF1-58 E-mail: rmb@ichips.intel.com 5200 N.E. Elam Young Parkway Phone: (503) 696-4728 Hillsboro, Oregon 97124 Fax: (503) 696-4515
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arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!uunet!zephyr.ens.tek.com!tektronix!percy!littlei!intelhf!ichips!omews57!rmbReferences:
<396@validgh.com> <1991Jun13.234834.22970@neon.Stanford.EDU> <1991Jun14.134338.4673@linus.mitre.org>Show Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!uunet!zephyr.ens.tek.com!tektronix!percy!littlei!intelhf!ichips!omews57!rmb From: rmb@omews57.intel.com (Bob Bentley) Newsgroups: comp.arch Subject: Re: More on Linpack pivoting: isamax and instruction set design Message-ID: <1991Jun14.183003.5669@ichips.intel.com> Date: 14 Jun 91 18:30:03 GMT References: <396@validgh.com> <1991Jun13.234834.22970@neon.Stanford.EDU> <1991Jun14.134338.4673@linus.mitre.org> Sender: news@ichips.intel.com (News Account) Organization: Intel Corp., Hillsboro, Oregon Lines: 28