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Article #12115

Re: isamax and instruction set design

#12115
From: Preston Briggs
Date: Sat, 15 Jun 1991 04:50
68 lines
2715 bytes
bs@faron.mitre.org (Robert D. Silverman) writes:

>:>:	    ibig  = absdx .le. dmax
>:>	    ^^^^^^^^^^^^^^^^^^^^^^^^
>:>
>:>I would be very interested in seeing the assembler code that gets
>:>emitted for this line of Fortran. How can this statement get executed
>:>WITHOUT a branch??

And I wrote

>:The RS/6000 could do this, basically assigning ibig to one of the
>:condition code registers.

And Silverman replies

>However, there is STILL a problem with the above expression.
> 
>absdx .le. dmax  is a BOOLEAN expression. It evaluates to either TRUE
>or FALSE.
>
>Hence, the above code simply says to store the value TRUE or FALSE
>into ibig according to whether absdx is less than dmax
>
>IT DOES NOT MEAN
>
>ibig = MINIMUM(absdx, dmax)


Right.  I think it's time for some of the original context:

andy@DEC-Lite.Stanford.EDU (Andy Freeman) wrote:
>
>	isamax = 1
>	dmax = abs(dx(1))
>	do 30 i = 2, n
>	    absdx = abs(dx(i))
>	    ibig  = absdx .le. dmax
>	    asm("<if ibig is true, replace isamax's value with i>")
>	    asm("<if ibig is true, replace dmax's value with absdx>")
>    30	continue

Surely it's clear that ibig is intended to be a boolean,
and hence may be (even "should be") allocated to a condition code register.
I expect Silverman misread the original code, think that 'ibig'
was to hold the min of absdx and dmax.

The question he probably wanted to ask is: How do you implement

	asm("<if ibig is true, replace isamax's value with i>")

??  Unfortunately, I answered the question he asked rather
than what he may have meant.  Trying again, ...

I suggest a skip instruction and a copy.

The idea of a skip is that the instruction fetcher gets ahead of
the executer.  By the time the condition is resolved, the fetcher
has already fetched well past the potentially skipped instruction;
therefore, execution can continue, skipping or not, with minimal
bubbling of the pipeline.  Of course, this _is_ a form of conditional
branch; but it's fast, executing in only 1 cycle, with an extra cycle
for the copy (if not skipping).

Tera's machine has (or will have) skip instructions.
Probably others do too.

Preston Briggs
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Message-ID: <1991Jun15.045025.2279@rice.edu>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!rice!asta.rice.edu!preston
References: <1991Jun14.134338.4673@linus.mitre.org> <1991Jun14.163141.17728@rice.edu> <1991Jun14.233032.23461@linus.mitre.org>

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!rice!asta.rice.edu!preston
From: preston@asta.rice.edu (Preston Briggs)
Newsgroups: comp.arch
Subject: Re: isamax and instruction set design
Message-ID: <1991Jun15.045025.2279@rice.edu>
Date: 15 Jun 91 04:50:25 GMT
References: <1991Jun14.134338.4673@linus.mitre.org> <1991Jun14.163141.17728@rice.edu> <1991Jun14.233032.23461@linus.mitre.org>
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