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Article #12125

Re: Branchless conditionals (Was: More on Linpack pivoting)

#12125
From: Andy Glew
Date: Sun, 16 Jun 1991 22:15
50 lines
2539 bytes
|> :	    ibig  = absdx .le. dmax
|> 	    ^^^^^^^^^^^^^^^^^^^^^^^^
|> 
|> I would be very interested in seeing the assembler code that gets
|> emitted for this line of Fortran. How can this statement get executed
|> WITHOUT a branch??

The Intel386(tm) architecture has SETcc (set on condition)
instructions that put 0/1 into a register depending on the condition
codes. So you would have:
    
    	cmp 	ebx,ecx 	! assuming absdx in ebx, dmax in ecx
    	setle	al  	    	! put 0/1 into al 

Set-conditional is rather common - I believe it is in the MIPS R2000
architecture (and I am sure I will be corrected if wrong), and the AMD
29K architecture.  Minor differences according to whether 0/1 or 0/-1
is stored.
    	


|> I also have never seen a machine that has conditional assignment
|> implemented as an instruction! (As indicated above). What machine is
|> this? Could you show us the assembler syntax??

The Cydra-5 had a conditional assignment instruction (like the phi
function in single assignment code). Semantics: dest := IF icr[N] THEN
val1 ELSE val2.  Cydra also conditionalized nearly all instructions,
as does the Acorn Risk machine, although I do not know if the ARM has
a conditional select.

Note that with a bit of masking conditional select can be acheived on
the 88K, as on most other machines.



|> I ** believe ** that the above conditional assignment will get compiled
|> into a test and branch. I don't know of any machine that provides
|> instructions to do otherwise.

I have seen some of the better x86 compilers compile this without a
branch.
--

Andy Glew, glew@ichips.intel.com
Intel Corp., M/S JF1-19, 5200 NE Elam Young Parkway, 
Hillsboro, Oregon 97124-6497

This is a private posting; it does not indicate opinions or positions
of Intel Corp.
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Message-ID: <GLEW.91Jun16151503@pdx007.intel.com>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!mips!cs.uoregon.edu!ogicse!pdxgate!parsely!agora!intelhf!ichips!ichips!glew
References: <396@validgh.com> <1991Jun13.234834.22970@neon.Stanford.EDU> <1991Jun14.134338.4673@linus.mitre.org> <1991Jun14.173510.22510@dg-rtp.dg.com>

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From: glew@pdx007.intel.com (Andy Glew)
Newsgroups: comp.arch
Subject: Re: Branchless conditionals (Was: More on Linpack pivoting)
Message-ID: <GLEW.91Jun16151503@pdx007.intel.com>
Date: 16 Jun 91 22:15:03 GMT
References: <396@validgh.com> <1991Jun13.234834.22970@neon.Stanford.EDU>
 <1991Jun14.134338.4673@linus.mitre.org>
 <1991Jun14.173510.22510@dg-rtp.dg.com>
Sender: news@ichips.intel.com (News Account)
Organization: Intel Corp., Hillsboro, Oregon
Lines: 50
In-Reply-To: hamilton@siberia.rtp.dg.com's message of 14 Jun 91 17:35:10 GMT