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Article #12142

Re: What is the ratio of programs sizes CISC versus RISC

#12142
From: Peter Kenneth LAWREY
Date: Tue, 18 Jun 1991 02:06
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In article <rwallace.677125555@unix1.tcd.ie> rwallace@unix1.tcd.ie (russell wallace) writes:
>"RISC" these days is not to be taken very literally. Most modern RISC
>processors have:
>lots of 32-bit registers
>orthogonal 3-operand instructions
>load/store with powerful addressing modes and optional sign-extension on loads
>integral floating-point

In one of the booklettes on the Transputer put out by inmos it describes the
Transputer as begining a "Reduced Instruction Set Computer for compact programs"

It has three registers, a stack and instructions that can be any multiple of
8 bits up to 72 or more. One quote of a definition of RISC "Any CPU announced
after 1985" or such.

Peter.
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Message-ID: <1991Jun18.020632.20037@mulga.cs.mu.OZ.AU>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!munnari.oz.au!cs.mu.OZ.AU!pkl
References: <pb.676737175@atperf.idca.tds.philips.nl> <rwallace.677125555@unix1.tcd.ie>

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!munnari.oz.au!cs.mu.OZ.AU!pkl
From: pkl@ee.mu.OZ.AU (Peter Kenneth LAWREY)
Newsgroups: comp.arch
Subject: Re: What is the ratio of programs sizes CISC versus RISC
Message-ID: <1991Jun18.020632.20037@mulga.cs.mu.OZ.AU>
Date: 18 Jun 91 02:06:32 GMT
References: <pb.676737175@atperf.idca.tds.philips.nl> <rwallace.677125555@unix1.tcd.ie>
Sender: news@cs.mu.OZ.AU
Organization: University of Melbourne, EE Engineering
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