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Article #12236

Re: Three-Level Metal

#12236
From: Renu Raman
Date: Sun, 23 Jun 1991 08:55
21 lines
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In article <4977@spim.mips.COM> wilkes@mips.com (John Wilkes) writes:
>In article <13560@pt.cs.cmu.edu> lindsay@gandalf.cs.cmu.edu (Donald Lindsay) writes:
>>
>>So, is the i860 really the first? And how many of the upcoming
>>superscalars will be three layer?
>
>The MIPS R6000 ECL processor, R6010 floating point controller and R6020
>system bus chip are all three layer metal.

Many ECL processes have had 3LM for sometime. What D. Lindsay was
refererring to is CMOS components (some current ECL and GaAS use 4 layers
of metal interconnect).

The new PA components are in a 1.0 micron 3LM process.
 
>-wilkes  <wilkes@mips.com>
--
--------------------------------
   Renukanthan Raman				ARPA:ram@sun.com
   M/S 16-11, 2500 Garcia Avenue,               TEL :415-336-1813
   Sun Microsystems, Mt. View,  CA 94043
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!apple!amdcad!sun!exodus!shukra.Eng.Sun.COM!ram
From: ram@shukra.Eng.Sun.COM (Renu Raman)
Newsgroups: comp.arch
Subject: Re: Three-Level Metal
Message-ID: <15662@exodus.Eng.Sun.COM>
Date: 23 Jun 91 08:55:58 GMT
References: <13560@pt.cs.cmu.edu> <4977@spim.mips.COM>
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