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Some other machines that have conditional assignment instructions:

1- The IBM TJWatson VLIW, developed by K.Ebcioglu. Its instructions
	are best represented as a tree such as

		if cc1 then
			R1=R2+R3
		else if cc2
`			R2=R3+R4
		else 
		        R3=R4+R5

   In other words, it allows for some form of ANDing of condition codes
to be specified on the (long) instruction.

2- The SIGNETICS LIFE processor: there, every opcode has a third (boolean)
	input. It also is a VLIW

3- The Multiflow TRACE has a "conditional assignment" opcode

	The references are


[1] @Article(IBMVLIW,
        Author="K. Ebcioglu",
        Key="IBM_VLIW",
        Title="Some Design Ideas for a VLIW Architecture for
Sequential-natured Software",
        Journal="Proceeding of the IFIP Working Conference on Parallel
Processing",
        Place="Pisa, Italy",
        Month="April",
        Year="1988")

[2]@Article(LIFE,
        Author="J. Labrousse, G. Slavenburg",
        Key="LIFE",
        Title="CREATE-LIFE: A Design System for High Performance VLSI Circuits",
        Journal="ICCD 1988")

[3]@Article(Colwell88,
        Author="R. P. Colwell et al.",
        Key="Colwell88",
        Title="A VLIW architecture for a trace scheduling compiler",
        Journal="IEEE Trans. Comp.",
        Month="Aug",
        Year="1988")
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