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Article #12334Re: Machines with cond. assignment instruction?
From: Shavit Amir
Date: Mon, 25 Jan 1993 08:24
Date: Mon, 25 Jan 1993 08:24
27 lines
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1325 bytes
Pradeep Dubey (pradeep@watson.ibm.com) wrote: : Hello Everyone, : Are there announced machines (specially micros) with : some conditional assignment instruction. I mean : instruction such as the following: : MovCond R1, R2, R3 /* if (c1) R1 <- R2 else R1 <- R3 */ : where, c1 refers to some result of some previous compare. : Any pointers to such machines or any quantitative evaluation : of usefulness of this instruction in the specific context : of some machine would be appreciated. : Thanks, : Pradeep The above instruction is a 4 operand instruction, as the condition code is another implicit source operand. The best way to perform a conditional move is to have compares set or clear all the bits in a register. Once that is done, conditional moves are simple. AND R1, R2 -> R4 /* R1 containes the condition code */ ANDNOT R1,R3 -> R4 Gad
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Path: arc1-ca.pugleaf.net!sparky!uunet!olivea!inews.Intel.COM!ilx018.intel.com!gss From: gss@ilx018.intel.com (Shavit Amir) Newsgroups: comp.arch Subject: Re: Machines with cond. assignment instruction? Message-ID: <1k0840INNjk0@ilx018.intel.com> Date: 25 Jan 93 08:24:32 GMT References: <1993Jan21.163607.31684@watson.ibm.com> Organization: Intel Israel (74) Ltd. Lines: 27 NNTP-Posting-Host: ilx061.intel.com X-Newsreader: TIN [version 1.1 PL8]