Need references on architecural comparison

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Article #12370

#12370

From: Ashish Mehra
Date: Tue, 26 Jan 1993 23:46

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I would appreciate if the knowledgable amongst you
can give me some pointers to articles on architectural
comparisons focusing on context switching overhead and
interrupt response time. Relevant processor architectures
are the R2000/3000, SPARC, 68030/40 and 486. Also,
is there any study done that compared the _relative_
performance gains of a synchronization instruction
like test-and-set over pure software mechanisms?

On a related note, the (context switching) numbers 
reported in the literature are directly related to 
the performance of the memory subsystem. Most comparisons 
report the absolute numbers without commenting on the 
speed/bandwidth of the memory subsytem on which the 
measurements were made. Am I missing something here? 
Shouldn't such factors be normalized out? 

I would appreciate if all responses are sent to
ashish@eecs.umich.edu . If there is sufficient 
interest, I will post a summary on this newsgroup.

Thanks,

Ashish Mehra
ashish@eecs.umich.edu

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From: ashish@blueridge.eecs.umich.edu (Ashish Mehra)
Subject: Need references on architecural comparison
Message-ID: <1993Jan26.234628.23217@zip.eecs.umich.edu>
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Organization: University of Michigan EECS Dept., Ann Arbor, MI
Date: Tue, 26 Jan 1993 23:46:28 GMT
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