🚀 go-pugleaf

In article <6346@rosie.NeXT.COM> Bob_Beckwith@NeXT.COM (Bob Beckwith) writes:
   In article <1993Jan21.163607.31684@watson.ibm.com> pradeep@watson.ibm.com  
   > Are there announced machines (specially micros) with
   > some conditional assignment instruction.  I mean
   > instruction such as the following:
   > 
   > MovCond R1, R2, R3 /* if (c1) R1 <- R2 else R1 <- R3 */
   > 
   > where, c1 refers to some result of some previous compare.
   > 
   > Any pointers to such machines or any quantitative evaluation
   > of usefulness of this instruction in the specific context
   > of some machine would be appreciated.

   Unless I'm mistaken, the Multiflow Trace machines had conditional assignment  
   instructions. While you certainly wouldn't classify them as micros, they're  
   there (or at least were, at one point :-( ). Any ex-Multifloyd's out there  
   (DBP? PKR?) might be able to provide more information.

Hi Bob and Pradeep: Yep, the MFCI Trace VLIWs had conditional moves. Really
handy in certain tight inner loops. To quote from our ASPLOS paper: "We
also included the integer SELECT operation, which provides the semantics of
the C "?" operator without branching." This worked so well that we expanded
this to include other operations in the /500 (which was under construction
when the company croaked) such as conditional stores.

It was a tad messy trying to work SELECTs into the basic ISA, though; this
operator has more sources than normal, so figuring out how to gracefully
specify three sources in an instruction format designed for two is not
trivial. "Graceful", of course, means the compiler code generator guy likes
it.

Bob Colwell  colwell@ichips.intel.com  503-696-4550
Intel Corp.  JF1-19
5200 NE Elam Young Parkway
Hillsboro, Oregon 97124