Article View: comp.arch
Article #12398Re: Harvard architecture
From: Reinhard Kirchner
Date: Thu, 28 Jan 1993 10:02
Date: Thu, 28 Jan 1993 10:02
22 lines
1465 bytes
1465 bytes
From article <1993Jan25.153333.7251@crd.ge.com>, by davidsen@ariel.crd.GE.COM (william E Davidsen): > > I agree, and I don't have the refference, either. > > What we had done was bank switching, such that when the CPU did an > opcode fetch, the M1 cycle, it came from the code bank, and when the CPU > did any other data access it went in the "data" bank. The program was > all written in a B offshoot called IMP, so I could easily avoid the self > modifying code prevalent at that time. > So I wonder: How was distinguished between the addtitonal fetches ( e.g. address, immediate operand ) of an instruction, and the true operand accesses ? It might be done be a decoder who knows about the various instruction lengthes, but this would be a quite complex piece of hardware. ( appr. halve a processor or so ) R. Kirchner Univ of Kaiserslautern, Germany kirchner@informatik.uni-kl.de
Technical Details
Message-ID:
<1993Jan28.100206.238@uklirb.informatik.uni-kl.de>Path:
arc1-ca.pugleaf.net!sparky!uunet!math.fu-berlin.de!ira.uka.de!rz.uni-karlsruhe.de!stepsun.uni-kl.de!uklirb!kirchnerReferences:
<1993Jan25.153333.7251@crd.ge.com>Show Full Headers
Complete Article Headers
Newsgroups: comp.arch Path: arc1-ca.pugleaf.net!sparky!uunet!math.fu-berlin.de!ira.uka.de!rz.uni-karlsruhe.de!stepsun.uni-kl.de!uklirb!kirchner From: kirchner@uklira.informatik.uni-kl.de (Reinhard Kirchner) Subject: Re: Harvard architecture Message-ID: <1993Jan28.100206.238@uklirb.informatik.uni-kl.de> Sender: news@uklirb.informatik.uni-kl.de (Unix-News-System) Nntp-Posting-Host: uklira.informatik.uni-kl.de Organization: University of Kaiserslautern, Germany References: <1993Jan25.153333.7251@crd.ge.com> Date: Thu, 28 Jan 1993 10:02:06 GMT Lines: 23