🚀 go-pugleaf

In article <1993Jan8.224906.15621@athena.mit.edu> jfc@athena.mit.edu (John F  
Carr) writes:
> In article <1993Jan8.111731.19116@odin.diku.dk>
> 	torbenm@diku.dk (Torben AEgidius Mogensen) writes:
> 
> >Newer processors (including the new ARMs) tend to have selectable
> >endianness instead of byte swap instructions.
> 
> The RS/6000 has a duplicate set of load and store instructions that
> byte-swap, but no register to register byte swap instruction.  The
> store multiple and string instructions only come in big-endian forms,
> but those tend to be used when byte reversal isn't important (it
> doesn't matter if the saved registers on the stack are byte swapped,
> as long as they are correct once restored).

Thanks to you and all the others who responded via mail for the info
but I feel I hadn't expressed myself clearly enough. What I am interested
in is "how high is the win" as a quantitative measure, i.e. somthing like
"I compiled an RPC library with a compiler that did not know about the
swap byte instruction (e.g. a 386 compiler) and later with a compiler that
did, and the difference was 5% to the benefit of one that used the swap
byte instruction"
or such. More generally spoken, I want to find out what one in missing
by running, on a 486 machine, a 386 Unix vs. a 486 one (regardless of the
existence of the latter).

--
Volker Herminghaus-Shirai (vhs@qb.rhein-main.de), NeXTmail welcome

Looks good on the outside, but -
	intel inside