🚀 go-pugleaf

In article <630@vu-vlsi.UUCP> elh@vu-vlsi.UUCP (Edward L. Hepler) writes:
>DMA controllers.  In particular, while I was working on the architecture/
>partitioning of some of the peripheral chips for the ATT WE32XXX family,

....

>This part also has a number of other interesting features including
>a *separate* byte wide bus which services commercially available
>byte wide peripherals (disk, lan, etc. controllers), byte to word
>packing, word buffering and burst mode bus transactions....  The 
>peripherals on the byte wide bus lie in the address space of the
>DMA peripheral which lies somewhere in the address space of the system
>(obviously...).
>
>Dr. Ed Hepler,  Adjunct Prof. Villanova University
>                Staff Engineer, GE Astro Space, Valley Forge
>                (Formally MTS, Bell Labs, Naperville, Ill.)

	Everyone doing serious peripheral design should look at this chip
(WE32106 I think). It must the the best DMA chip on the market ... only one
catch - the price $250 a piece in 100 quantities. Still, if you want to see
how to design a DMA chip right (esp. if you are going to design one), look
at this one.


		Paul Campbell
		..!ucbvax!unisoft!paul