🚀 go-pugleaf

In article <246@root44.root.co.uk>, njh@root.co.uk (Nigel Horne) writes:
> In article <518@gec-mi-at.co.uk> you write:
> >In article <4343@columbia.UUCP>, dupuy@amsterdam.columbia.edu (Alexander Dupuy) writes:
> >>> [] would
> >>> there be any advantage in having a DMA chip which would simply be used for
> >>> memory to memory copies (from user to kernel space, or from one user space to
> >>> another)?
> >
> >Yup. You don't wear out the cpu so much.
> 
> When doing a port of UniPlus+ on a machine with a spare channel on it's
> 68450 I tried a few benchmarks. I'm afraid (with a 68k at least) it was
> slower using the 68450 than the 68010 (dbra's, moveml's etc.) for memory
> to memory copies......
> 
> Nigel Horne, Divisional Director, Root Technical Systems.

This is probably due in part to the fact that the 68450 does not (I believe)
have the capability of doing "burst" transfers (Issue one address followed
by 2,4 words of data without the overhead of the entire bus cycle). This
along with (if I remember correctly) the fact that the part had a multiplexed
address/data bus (at the part) hurt its performance.  Notice that using
moveml instructions to effect a block move (as suggested in the article)
really emulate a "burst" (in a manner). Up to 16 words (every register) 
can be copied in using contiguous bus cycles (non-multiplexed) and then 
copied back out... 

The ATT (WE32xxx) part (which I am familiar with) provides the capability
to perform such burst mode transfers. Of course the memory system must
be capable of servicing such requests.

Ed Hepler
Villanova University