🚀 go-pugleaf

In article <237@winchester.mips.UUCP> mash@winchester.UUCP (John Mashey) writes:
>In article <948@spar.SPAR.SLB.COM> freeman@spar.UUCP (Jay Freeman) writes:
>>
>>How about special floating-point instructions to support "cortic" (have I
>>got that spelled right?)  algorithms for transcendental functions?  (I
>
>I think it's "quartic", and I think there may be some justification
>for them, depending on the silicon tradeoffs, i.e., does it cost you
>time in add or multiply to put the quartics on.  Depending on the
>target applications, it may or may not be worth it.
>......

Are you all talking about CORDIC (Coordinate Rotation Digital Computer)
a la Ramamoorthy? If so, I don't understand the question. If one has an
FPU with transcendentals, one doesn't need (or want) Cordic algorithms. If
there is no FPU (I assume this is what is being discussed), and one wants
to implement transcendentals, I doubt whether one would want to use Cordic
method, since it is _extremely_ iterative and unless there was a very large
on-chip cache, would eat up bandwidth like crazy.

If one decided anyway to implement Cordic method, there are _no_ special
instructions necessary to do so (which is why it's so neat - I wrote it
for both a PE32 and a 6502). The entire algorithm can be implemented with
one table look-up and successive bit shifts, increments and decrements,
yeilding hyperbolic functions, sines, arctans, etc.

This is also the reason it is such a great method for implementation in
silicon (I believe there was a report on such a chip in IEEE Spectrum or
Computer last spring) -- it can do transcendentals in a few cpu
cycles (versus 68881: FATANH=693 cycles, FLOGN=525, FCOS=391, you get the
point).

Anyone who can tell me why these chips (1) weren't developed years ago and
(2) aren't standard on every medium-size architecture with floating point
deserves a beer.

			Peter Fay
			Research
			Encore Computer Corp.

{allegra decvax ihnp4 linus okstate princeton pur-ee talcott}!encore!fay