🚀 go-pugleaf

In article <1805@pyramid.UUCP> csg@pyramid.UUCP (Carl S. Gutekunst) writes:
>In article <501@sw1e.UUCP> uusgth@sw1e.UUCP (uusgth) writes:
>>The NP1 is the first of a new architecture from Gould, called the NPL series,
>>that brings ultra-high performance to minicomputers at price performance
>>factors well below the current industry.
>>
>>The NP1 is an ECL, gate-array processor sitting on a very fast bus (154 mega-
>>bytes per second). With 2 cpu's on the same bus, coupled with a math accelera-
>>tor unit, it does 12 MIPS sustained at a base price of about $400,000.
>
>Ummm, I'm sure that Arete, Encore, Pyramid, and Sequent would be happy to tell
>you about 12 MIPS superminicomputers with fast busses that sell for a lot less
>than $400K for a fully configured system. Elxsi and Convex too, I think.
>
>I can't believe this posting does these machines justice. Could someone post
>some technical info?

ELXSI
-----
  The ELXSI is a multiprocessor with an architecture similar to the 
  description of the Gould NP1 given in the original posting.  It has 
  a relatively small number of fast CPUs plugged into a high-speed bus
  over which they access a large shared memory and communicate with one
  another.

  CPUs:  
 	 From 1 to 12 64-bit ECL, gate-array processors on a REALLY fast
         bus (320MB/sec, over twice the Gould's).  There are two models
         of CPUs, the 6410 released in 1984 and the 6420 released in 1986.
         These are completely compatible and can coexist in the same system.
	 CPU cycle time is 50ns.

         The 6410 measures about 7 Whetstone MIPS, while the 6420 does about
         12, which sounds the same as the Gould CPU described above.
	 I don't know how Gould is measuring their MIPS, however.  If you
         measure MIPS by running nroff and calling a VAX/780 1 MIP, then
         an ELXSI 6410 is about a 4 (like a VAX 8600) and a 6420 is about a 
	 6 (like a VAX 8650 or 8700).  Floating point, especially 64-bit 
	 floating point, is much faster.

	 The instruction set is between a RISC and a CISC.  (I hesitate
	 to call it a MISC, however. :-)  Instructions are regular and
	 simple but there are several addressing modes.  The machine is
	 message based, so in addition to the normal instructions, there are 
	 about a dozen instructions implementing a message system.  (E.g.,
	 send and receive instructions, with asynchronous and synchronous
	 variants.)

         The CPUs contain special hardware to support extremely fast 
	 context switches - about 10 microseconds.  There are 16 sets
         of 16 64-bit GPRs and 16 sets of TLB translations in each CPU.
	 A context switch is handled completely in microcode on detection
         of events such as a quantum fault, page fault or receipt of a
         message.   A software scheduler running on each CPU decides
         which processes get to be in register sets at any given time.
         A realtime process can be locked into a register set so that
	 it can begin execution 10 usecs after being notified of an
         external event, even if timesharing is going on at the same
         time.  

	 The 6410 has a 16KB cache, while the 6420 has 64KB.  Cache
	 cycle time is 25ns.  The cache board plugs directly into the
	 320MB/sec bus (called the Gigabus) and accesses the shared 
         global memory (up to 2 GB) over the bus.  Access time is 
	 400ns for a 16-byte read or an 8-byte write.

  I/O system:

	 I/O is handled by 1 to 4 I/O processors.  Each of these is
	 actually an ELXSI 6410 CPU with the floating point board replaced
	 by an I/O bus handling board.  This additional board provides two
	 8 MB/sec I/O channels.  I/O capacity through the I/O processors
	 is thus 16-64 MB/sec.  

         A board providing direct access to the Gigabus exists, but is
	 not commonly used for device I/O.  It is currently being used as
	 a Cray interface.

  Software:

         The ELXSI supports a shareable "virtual machine" kernel which
	 handles the paging system, process scheduling, load balancing,
	 etc.  This kernel is called the ELXSI System Foundation.  Its
         services are currently used to support four operating systems -
         two separate Unix ports (System V and 4.2), a VMS-compatible
         system called "EMS", and a proprietary OS called EMBOS.  The
	 operating systems can all run concurrently, in fact there can
	 even by multiple copies of each Unix system.  (We use this facility
	 in house for OS development - we have one stable timesharing
	 BSD system, for example, and several "standalone" systems which
	 we constantly crash.)

  	 The System Foundation performs only a coordination role for performance
	 sensitive activities such as disk access.  Once everyone agrees on
	 which operating system owns which part of the disk, each OS speaks
	 directly to the disk controllers.  The normal Unix filesystem 
	 layouts are maintained - System V uses the original Unix FS, while
	 BSD uses the fast file system.  The System Foundation facilities
	 can be used by suitably privileged user applications.  In fact,
	 an application can run directly connected to various pieces of
	 hardware and at a priority higher than any operating system process,
	 without necessarily being able to do any damage to the rest of
	 the system (except for performance).

	 The Unix ports are rather plain vanilla ports. A message interface
	 was stuck into the system call library to replace the normal "trap"
	 interface.  The memory management and CPU scheduling code was 
	 replaced by messages to the System Foundation services.  Most 
	 everything else was left alone.
	
	 OS parallelism is achieved by having numerous separate processes
	 handling separate tasks, rather than having all CPUs trying to
	 perform the same tasks.  There is no time at which an OS process
	 running on one CPU can lock out one running on another.

Price: 
         List price is about $400K for a single CPU system.  Additional CPUs are
         roughly 150K for a 6410 and 200K for a 6420.
-- 
-------------------------------------------------------------------------------
Michael Sherman
...!{sun|styx}!elxsi!sherm